diff options
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.c | 17 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.h | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_regions.c | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_validate.c | 2 |
5 files changed, 20 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index a7d94ced9a9..e0022ad5481 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -477,7 +477,7 @@ intel_flush(GLcontext *ctx, GLboolean needs_mi_flush) if (intel->Fallback) _swrast_flush(ctx); - if (!IS_965(intel->intelScreen->deviceID)) + if (intel->gen < 4) INTEL_FIREVERTICES(intel); /* Emit a flush so that any frontbuffer rendering that might have occurred @@ -614,6 +614,13 @@ intelInitContext(struct intel_context *intel, intel->sarea = intelScreen->sarea; intel->driContext = driContextPriv; + if (IS_965(intel->intelScreen->deviceID)) + intel->gen = 4; + else if (IS_9XX(intel->intelScreen->deviceID)) + intel->gen = 3; + else + intel->gen = 2; + /* Dri stuff */ intel->hHWContext = driContextPriv->hHWContext; intel->driFd = sPriv->fd; @@ -621,7 +628,7 @@ intelInitContext(struct intel_context *intel, driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, intel->driScreen->myNum, - IS_965(intelScreen->deviceID) ? "i965" : "i915"); + (intel->gen >= 4) ? "i965" : "i915"); if (intelScreen->deviceID == PCI_CHIP_I865_G) intel->maxBatchSize = 4096; else @@ -683,7 +690,7 @@ intelInitContext(struct intel_context *intel, meta_init_metaops(ctx, &intel->meta); ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */ - if (IS_965(intelScreen->deviceID)) { + if (intel->gen >= 4) { if (MAX_WIDTH > 8192) ctx->Const.MaxRenderbufferSize = 8192; } else { @@ -720,7 +727,7 @@ intelInitContext(struct intel_context *intel, break; } - if (IS_965(intelScreen->deviceID)) + if (intel->gen >= 4) intel->polygon_offset_scale /= 0xffff; intel->RenderIndex = ~0; @@ -733,7 +740,7 @@ intelInitContext(struct intel_context *intel, intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); - if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) { + if (intel->gen >= 4 && !intel->intelScreen->irq_active) { _mesa_printf("IRQs not active. Exiting\n"); exit(1); } diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 356fa4d1e58..2fc224e51ad 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -183,6 +183,11 @@ struct intel_context dri_bufmgr *bufmgr; unsigned int maxBatchSize; + /** + * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965. + */ + int gen; + struct intel_region *front_region; struct intel_region *back_region; struct intel_region *depth_region; diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 3996c100a55..2a19816e12e 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -122,7 +122,7 @@ intel_miptree_create(struct intel_context *intel, if (intel->use_texture_tiling && compress_byte == 0 && intel->intelScreen->kernel_exec_fencing) { - if (IS_965(intel->intelScreen->deviceID) && + if (intel->gen >= 4 && (base_format == GL_DEPTH_COMPONENT || base_format == GL_DEPTH_STENCIL_EXT)) tiling = I915_TILING_Y; diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index a86c66a8443..80975163d47 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -582,8 +582,7 @@ intel_recreate_static(struct intel_context *intel, * instead of which tiling mode it is. Guess. */ if (region_desc->tiled) { - if (IS_965(intel->intelScreen->deviceID) && - region_desc == &intelScreen->depth) + if (intel->gen >= 4 && region_desc == &intelScreen->depth) region->tiling = I915_TILING_Y; else region->tiling = I915_TILING_X; diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c index 504993989ae..df93b3b7598 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_validate.c +++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c @@ -42,7 +42,7 @@ intel_calculate_first_last_level(struct intel_context *intel, firstLevel = lastLevel = tObj->BaseLevel; } else { - if (!IS_9XX(intel->intelScreen->deviceID)) { + if (intel->gen == 2) { firstLevel = tObj->BaseLevel + (GLint) (tObj->MinLod + 0.5); firstLevel = MAX2(firstLevel, tObj->BaseLevel); firstLevel = MIN2(firstLevel, tObj->BaseLevel + baseImage->MaxLog2); |