summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c2
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c3
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h9
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c33
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_pipe.c2
5 files changed, 23 insertions, 26 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 8ee9487c585..097a6b8cf40 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -1060,8 +1060,6 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
rscreen->b.debug_flags |= DBG_NO_HYPERZ;
if (!debug_get_bool_option("R600_LLVM", TRUE))
rscreen->b.debug_flags |= DBG_NO_LLVM;
- if (debug_get_bool_option("R600_PRINT_TEXDEPTH", FALSE))
- rscreen->b.debug_flags |= DBG_TEX_DEPTH;
if (rscreen->b.family == CHIP_UNKNOWN) {
fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->b.info.pci_id);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 190896b116f..852993c0fc2 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -31,7 +31,8 @@
static const struct debug_named_value common_debug_options[] = {
/* logging */
- { "texdepth", DBG_TEX_DEPTH, "Print texture depth info" },
+ { "tex", DBG_TEX, "Print texture info" },
+ { "texmip", DBG_TEXMIP, "Print texture info (mipmapped only)" },
{ "compute", DBG_COMPUTE, "Print compute info" },
{ "vm", DBG_VM, "Print virtual addresses when creating resources" },
{ "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_<csid>.c file with faulty cs" },
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index f71b712a442..f0fcaacc614 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -61,10 +61,11 @@
/* Debug flags. */
/* logging */
-#define DBG_TEX_DEPTH (1 << 0)
-#define DBG_COMPUTE (1 << 1)
-#define DBG_VM (1 << 2)
-#define DBG_TRACE_CS (1 << 3)
+#define DBG_TEX (1 << 0)
+#define DBG_TEXMIP (1 << 1)
+#define DBG_COMPUTE (1 << 2)
+#define DBG_VM (1 << 3)
+#define DBG_TRACE_CS (1 << 4)
/* shaders */
#define DBG_FS (1 << 8)
#define DBG_VS (1 << 9)
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 26eee12c804..e83ce836309 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -580,7 +580,8 @@ r600_texture_create_object(struct pipe_screen *screen,
base->nr_samples ? base->nr_samples : 1, util_format_short_name(base->format));
}
- if (rscreen->debug_flags & DBG_TEX_DEPTH && rtex->is_depth) {
+ if (rscreen->debug_flags & DBG_TEX ||
+ (rtex->resource.b.b.last_level > 0 && rscreen->debug_flags & DBG_TEXMIP)) {
printf("Texture: npix_x=%u, npix_y=%u, npix_z=%u, blk_w=%u, "
"blk_h=%u, blk_d=%u, array_size=%u, last_level=%u, "
"bpe=%u, nsamples=%u, flags=%u\n",
@@ -590,22 +591,20 @@ r600_texture_create_object(struct pipe_screen *screen,
rtex->surface.array_size, rtex->surface.last_level,
rtex->surface.bpe, rtex->surface.nsamples,
rtex->surface.flags);
- if (rtex->surface.flags & RADEON_SURF_ZBUFFER) {
- for (int i = 0; i <= rtex->surface.last_level; i++) {
- printf(" Z %i: offset=%llu, slice_size=%llu, npix_x=%u, "
- "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
- "nblk_z=%u, pitch_bytes=%u, mode=%u\n",
- i, rtex->surface.level[i].offset,
- rtex->surface.level[i].slice_size,
- u_minify(rtex->resource.b.b.width0, i),
- u_minify(rtex->resource.b.b.height0, i),
- u_minify(rtex->resource.b.b.depth0, i),
- rtex->surface.level[i].nblk_x,
- rtex->surface.level[i].nblk_y,
- rtex->surface.level[i].nblk_z,
- rtex->surface.level[i].pitch_bytes,
- rtex->surface.level[i].mode);
- }
+ for (int i = 0; i <= rtex->surface.last_level; i++) {
+ printf(" Z %i: offset=%llu, slice_size=%llu, npix_x=%u, "
+ "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
+ "nblk_z=%u, pitch_bytes=%u, mode=%u\n",
+ i, rtex->surface.level[i].offset,
+ rtex->surface.level[i].slice_size,
+ u_minify(rtex->resource.b.b.width0, i),
+ u_minify(rtex->resource.b.b.height0, i),
+ u_minify(rtex->resource.b.b.depth0, i),
+ rtex->surface.level[i].nblk_x,
+ rtex->surface.level[i].nblk_y,
+ rtex->surface.level[i].nblk_z,
+ rtex->surface.level[i].pitch_bytes,
+ rtex->surface.level[i].mode);
}
if (rtex->surface.flags & RADEON_SURF_SBUFFER) {
for (int i = 0; i <= rtex->surface.last_level; i++) {
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 81cc22277c0..5016e13dab3 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -793,8 +793,6 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
return NULL;
}
- if (debug_get_bool_option("RADEON_PRINT_TEXDEPTH", FALSE))
- rscreen->b.debug_flags |= DBG_TEX_DEPTH;
if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;