3 files changed, 40 insertions, 2 deletions

diff --git a/src/gallium/drivers/radeonsi/radeonsi_pm4.c b/src/gallium/drivers/radeonsi/radeonsi_pm4.c
index 13fe99be3bd..3c53ce2e172 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pm4.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pm4.c
@@ -96,6 +96,29 @@ void si_pm4_add_bo(struct si_pm4_state *state,
 	state->bo_usage[idx] = usage;
 }
 
+void si_pm4_sh_data_begin(struct si_pm4_state *state)
+{
+	si_pm4_cmd_begin(state, PKT3_NOP);
+}
+
+void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw)
+{
+	si_pm4_cmd_add(state, dw);
+}
+
+void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg)
+{
+	unsigned offs = state->last_pm4 + 1;
+	si_pm4_cmd_end(state, false);
+
+	si_pm4_cmd_begin(state, PKT3_SET_SH_REG_OFFSET);
+	si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2);
+	state->relocs[state->nrelocs++] = state->ndw;
+	si_pm4_cmd_add(state, offs << 2);
+	si_pm4_cmd_add(state, 0);
+	si_pm4_cmd_end(state, false);
+}
+
 void si_pm4_inval_shader_cache(struct si_pm4_state *state)
 {
 	state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
@@ -181,6 +204,11 @@ void si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state)
 	}
 
 	memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
+
+	for (int i = 0; i < state->nrelocs; ++i) {
+		cs->buf[cs->cdw + state->relocs[i]] += cs->cdw << 2;
+	}
+
 	cs->cdw += state->ndw;
 }
 
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pm4.h b/src/gallium/drivers/radeonsi/radeonsi_pm4.h
index 803bb8f572d..2b32ffb8155 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pm4.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_pm4.h
@@ -29,8 +29,9 @@
 
 #include "../../winsys/radeon/drm/radeon_winsys.h"
 
-#define SI_PM4_MAX_DW	128
-#define SI_PM4_MAX_BO	32
+#define SI_PM4_MAX_DW		128
+#define SI_PM4_MAX_BO		32
+#define SI_PM4_MAX_RELOCS	4
 
 // forward defines
 struct r600_context;
@@ -53,6 +54,10 @@ struct si_pm4_state
 	unsigned		nbo;
 	struct si_resource	*bo[SI_PM4_MAX_BO];
 	enum radeon_bo_usage	bo_usage[SI_PM4_MAX_BO];
+
+	/* relocs for shader data */
+	unsigned	nrelocs;
+	unsigned	relocs[SI_PM4_MAX_RELOCS];
 };
 
 void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode);
@@ -64,6 +69,10 @@ void si_pm4_add_bo(struct si_pm4_state *state,
 		   struct si_resource *bo,
 		   enum radeon_bo_usage usage);
 
+void si_pm4_sh_data_begin(struct si_pm4_state *state);
+void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw);
+void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg);
+
 void si_pm4_inval_shader_cache(struct si_pm4_state *state);
 void si_pm4_inval_texture_cache(struct si_pm4_state *state);
 void si_pm4_inval_vertex_cache(struct si_pm4_state *state);
diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h
index 325445c97e0..d26e1946db8 100644
--- a/src/gallium/drivers/radeonsi/sid.h
+++ b/src/gallium/drivers/radeonsi/sid.h
@@ -93,6 +93,7 @@
 #define PKT3_SET_CONFIG_REG                    0x68
 #define PKT3_SET_CONTEXT_REG                   0x69
 #define PKT3_SET_SH_REG                        0x76
+#define PKT3_SET_SH_REG_OFFSET                 0x77
 
 #define PKT_TYPE_S(x)                   (((x) & 0x3) << 30)
 #define PKT_TYPE_G(x)                   (((x) >> 30) & 0x3)