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-rw-r--r--src/amd/vulkan/radv_device.c25
-rw-r--r--src/amd/vulkan/radv_private.h2
2 files changed, 20 insertions, 7 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 3aac247f8ba..cfedff434b0 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -710,11 +710,23 @@ VkResult radv_CreateDevice(
radv_finishme("DCC fast clears have not been tested\n");
radv_device_init_msaa(device);
- device->empty_cs = device->ws->cs_create(device->ws, RING_GFX);
- radeon_emit(device->empty_cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
- radeon_emit(device->empty_cs, CONTEXT_CONTROL_LOAD_ENABLE(1));
- radeon_emit(device->empty_cs, CONTEXT_CONTROL_SHADOW_ENABLE(1));
- device->ws->cs_finalize(device->empty_cs);
+
+ for (int family = 0; family < RADV_MAX_QUEUE_FAMILIES; ++family) {
+ device->empty_cs[family] = device->ws->cs_create(device->ws, family);
+ switch (family) {
+ case RADV_QUEUE_GENERAL:
+ radeon_emit(device->empty_cs[family], PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
+ radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_LOAD_ENABLE(1));
+ radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_SHADOW_ENABLE(1));
+ break;
+ case RADV_QUEUE_COMPUTE:
+ radeon_emit(device->empty_cs[family], PKT3(PKT3_NOP, 0, 0));
+ radeon_emit(device->empty_cs[family], 0);
+ break;
+ }
+ device->ws->cs_finalize(device->empty_cs[family]);
+ }
+
*pDevice = radv_device_to_handle(device);
return VK_SUCCESS;
@@ -869,7 +881,8 @@ VkResult radv_QueueSubmit(
if (fence) {
if (!submitCount)
- ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, &queue->device->empty_cs,
+ ret = queue->device->ws->cs_submit(ctx, queue->queue_idx,
+ &queue->device->empty_cs[queue->queue_family_index],
1, NULL, 0, NULL, 0, false, base_fence);
fence->submitted = true;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 03d295986f3..e15556ea57b 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -473,7 +473,7 @@ struct radv_device {
struct radv_queue *queues[RADV_MAX_QUEUE_FAMILIES];
int queue_count[RADV_MAX_QUEUE_FAMILIES];
- struct radeon_winsys_cs *empty_cs;
+ struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
bool allow_fast_clears;
bool allow_dcc;