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-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.c56
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.h1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h4
4 files changed, 3 insertions, 62 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index a8dfae01923..c9f9b207811 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -67,57 +67,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Scissoring
*/
-static GLboolean intersect_rect(drm_clip_rect_t * out,
- drm_clip_rect_t * a, drm_clip_rect_t * b)
-{
- *out = *a;
- if (b->x1 > out->x1)
- out->x1 = b->x1;
- if (b->y1 > out->y1)
- out->y1 = b->y1;
- if (b->x2 < out->x2)
- out->x2 = b->x2;
- if (b->y2 < out->y2)
- out->y2 = b->y2;
- if (out->x1 >= out->x2)
- return GL_FALSE;
- if (out->y1 >= out->y2)
- return GL_FALSE;
- return GL_TRUE;
-}
-
-void radeonRecalcScissorRects(radeonContextPtr radeon)
-{
- struct gl_context *ctx = radeon->glCtx;
- drm_clip_rect_t bounds;
-
- bounds.x1 = 0;
- bounds.y1 = 0;
- bounds.x2 = ctx->DrawBuffer->Width;
- bounds.y2 = ctx->DrawBuffer->Height;
-
- if (!radeon->state.scissor.numAllocedClipRects) {
- radeon->state.scissor.numAllocedClipRects = 1;
- radeon->state.scissor.pClipRects =
- MALLOC(sizeof(drm_clip_rect_t));
-
- if (radeon->state.scissor.pClipRects == NULL) {
- radeon->state.scissor.numAllocedClipRects = 0;
- return;
- }
- }
-
- radeon->state.scissor.numClipRects = 0;
- if (intersect_rect(radeon->state.scissor.pClipRects,
- &bounds,
- &radeon->state.scissor.rect)) {
- radeon->state.scissor.numClipRects = 1;
- }
-
- if (radeon->vtbl.update_scissor)
- radeon->vtbl.update_scissor(radeon->glCtx);
-}
-
/**
* Update cliprects and scissors.
*/
@@ -149,7 +98,7 @@ void radeonSetCliprects(radeonContextPtr radeon)
}
if (radeon->state.scissor.enabled)
- radeonRecalcScissorRects(radeon);
+ radeonUpdateScissor(radeon->glCtx);
}
@@ -187,7 +136,8 @@ void radeonUpdateScissor( struct gl_context *ctx )
rmesa->state.scissor.rect.x2 = CLAMP(x2, min_x, max_x);
rmesa->state.scissor.rect.y2 = CLAMP(y2, min_y, max_y);
- radeonRecalcScissorRects( rmesa );
+ if (rmesa->vtbl.update_scissor)
+ rmesa->vtbl.update_scissor(ctx);
}
/* =============================================================
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index 6f9b5b9a408..636822faed2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -6,7 +6,6 @@
#include "radeon_texture.h"
void radeonUserClear(struct gl_context *ctx, GLuint mask);
-void radeonRecalcScissorRects(radeonContextPtr radeon);
void radeonSetCliprects(radeonContextPtr radeon);
void radeonUpdateScissor( struct gl_context *ctx );
void radeonScissor(struct gl_context* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index b5fe7cdd049..8ea8925d8a2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -260,10 +260,6 @@ void radeonDestroyContext(__DRIcontext *driContextPriv )
radeon_destroy_atom_list(radeon);
- if (radeon->state.scissor.pClipRects) {
- FREE(radeon->state.scissor.pClipRects);
- radeon->state.scissor.pClipRects = 0;
- }
#ifdef RADEON_BO_TRACK
track = fopen("/tmp/tracklog", "w");
if (track) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 11275f8bc5c..5c2389208f1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -122,10 +122,6 @@ struct radeon_depthbuffer_state {
struct radeon_scissor_state {
drm_clip_rect_t rect;
GLboolean enabled;
-
- GLuint numClipRects; /* Cliprects active */
- GLuint numAllocedClipRects; /* Cliprects available */
- drm_clip_rect_t *pClipRects;
};
struct radeon_state_atom {