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-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_util.c44
-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_util.h5
2 files changed, 0 insertions, 49 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index 6d6b6923f14..07a160fc403 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -267,50 +267,6 @@ brw_meta_mirror_clip_and_scissor(const struct gl_context *ctx,
}
/**
- * Creates a new named renderbuffer that wraps the first slice
- * of an existing miptree.
- *
- * Clobbers the current renderbuffer binding (ctx->CurrentRenderbuffer).
- */
-struct gl_renderbuffer *
-brw_get_rb_for_slice(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned level, unsigned layer, bool flat)
-{
- struct gl_context *ctx = &brw->ctx;
- struct gl_renderbuffer *rb = ctx->Driver.NewRenderbuffer(ctx, 0xDEADBEEF);
- struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
- rb->RefCount = 1;
- rb->Format = mt->format;
- rb->_BaseFormat = _mesa_get_format_base_format(mt->format);
-
- /* Program takes care of msaa and mip-level access manually for stencil.
- * The surface is also treated as Y-tiled instead of as W-tiled calling for
- * twice the width and half the height in dimensions.
- */
- if (flat) {
- const unsigned halign_stencil = 8;
-
- rb->NumSamples = 0;
- rb->Width = ALIGN(mt->total_width, halign_stencil) * 2;
- rb->Height = (mt->total_height / mt->physical_depth0) / 2;
- irb->mt_level = 0;
- } else {
- rb->NumSamples = mt->num_samples;
- rb->Width = mt->logical_width0;
- rb->Height = mt->logical_height0;
- irb->mt_level = level;
- }
-
- irb->mt_layer = layer;
-
- intel_miptree_reference(&irb->mt, mt);
-
- return rb;
-}
-
-/**
* Determine if fast color clear supports the given clear color.
*
* Fast color clear can only clear to color values of 1.0 or 0.0. At the
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.h b/src/mesa/drivers/dri/i965/brw_meta_util.h
index 93bc72cf258..207a54b382b 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.h
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.h
@@ -57,11 +57,6 @@ brw_is_color_fast_clear_compatible(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
const union gl_color_union *color);
-struct gl_renderbuffer *brw_get_rb_for_slice(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned level, unsigned layer,
- bool flat);
-
#ifdef __cplusplus
}
#endif