diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_hw_context.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 21 |
3 files changed, 17 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c index a40387cadb9..b55cbf34948 100644 --- a/src/gallium/drivers/radeonsi/si_hw_context.c +++ b/src/gallium/drivers/radeonsi/si_hw_context.c @@ -159,4 +159,6 @@ void si_begin_new_cs(struct si_context *ctx) ctx->last_primitive_restart_en = -1; ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN; ctx->last_gs_out_prim = -1; + ctx->last_prim = -1; + ctx->last_multi_vgt_param = -1; } diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 6766635b0a1..8e89e4a2ef0 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -183,6 +183,8 @@ struct si_context { int last_primitive_restart_en; int last_restart_index; int last_gs_out_prim; + int last_prim; + int last_multi_vgt_param; }; /* si_blit.c */ diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 4ae825386e2..195d98118f4 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -179,14 +179,19 @@ static void si_emit_draw_registers(struct si_context *sctx, unsigned ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info); /* Draw state. */ - if (sctx->b.chip_class >= CIK) { - radeon_emit(cs, PKT3(PKT3_DRAW_PREAMBLE, 2, 0)); - radeon_emit(cs, prim); /* VGT_PRIMITIVE_TYPE */ - radeon_emit(cs, ia_multi_vgt_param); /* IA_MULTI_VGT_PARAM */ - radeon_emit(cs, 0); /* VGT_LS_HS_CONFIG */ - } else { - r600_write_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim); - r600_write_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); + if (prim != sctx->last_prim || + ia_multi_vgt_param != sctx->last_multi_vgt_param) { + if (sctx->b.chip_class >= CIK) { + radeon_emit(cs, PKT3(PKT3_DRAW_PREAMBLE, 2, 0)); + radeon_emit(cs, prim); /* VGT_PRIMITIVE_TYPE */ + radeon_emit(cs, ia_multi_vgt_param); /* IA_MULTI_VGT_PARAM */ + radeon_emit(cs, 0); /* VGT_LS_HS_CONFIG */ + } else { + r600_write_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim); + r600_write_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); + } + sctx->last_prim = prim; + sctx->last_multi_vgt_param = ia_multi_vgt_param; } if (gs_out_prim != sctx->last_gs_out_prim) { |