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-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c2
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h2
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c6
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c6
4 files changed, 1 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 8fae74d7add..faa739051e5 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -203,7 +203,7 @@ void r600_dma_emit_wait_idle(struct r600_common_context *rctx)
* It improves texture upload performance by keeping the DMA
* engine busy while uploads are being submitted.
*/
- if (rctx->ws->cs_query_memory_usage(rctx->dma.cs) > 64 * 1024 * 1024) {
+ if (cs->used_vram + cs->used_gart > 64 * 1024 * 1024) {
rctx->dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
return;
}
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index e6f5a89c07d..2dd4a39bab4 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -718,8 +718,6 @@ struct radeon_winsys {
bool (*cs_memory_below_limit)(struct radeon_winsys_cs *cs,
uint64_t vram, uint64_t gtt);
- uint64_t (*cs_query_memory_usage)(struct radeon_winsys_cs *cs);
-
/**
* Return the buffer list.
*
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 1f2e9264d26..b3c5d6e2645 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -799,11 +799,6 @@ static bool amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs,
return gtt < ws->info.gart_size * 0.7;
}
-static uint64_t amdgpu_cs_query_memory_usage(struct radeon_winsys_cs *rcs)
-{
- return rcs->used_vram + rcs->used_gart;
-}
-
static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
@@ -1118,7 +1113,6 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws)
ws->base.cs_validate = amdgpu_cs_validate;
ws->base.cs_check_space = amdgpu_cs_check_space;
ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
- ws->base.cs_query_memory_usage = amdgpu_cs_query_memory_usage;
ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
ws->base.cs_flush = amdgpu_cs_flush;
ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 26d5a229633..15eeb40cb15 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -404,11 +404,6 @@ static bool radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint6
return gtt < cs->ws->info.gart_size * 0.7;
}
-static uint64_t radeon_drm_cs_query_memory_usage(struct radeon_winsys_cs *rcs)
-{
- return rcs->used_vram + rcs->used_gart;
-}
-
static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
@@ -682,7 +677,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
ws->base.cs_validate = radeon_drm_cs_validate;
ws->base.cs_check_space = radeon_drm_cs_check_space;
ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
- ws->base.cs_query_memory_usage = radeon_drm_cs_query_memory_usage;
ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;
ws->base.cs_flush = radeon_drm_cs_flush;
ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;