diff options
| -rw-r--r-- | src/panfrost/midgard/compiler.h | 23 | ||||
| -rw-r--r-- | src/panfrost/midgard/midgard_ra.c | 8 |
2 files changed, 16 insertions, 15 deletions
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h index a6facae4422..faeecf0150c 100644 --- a/src/panfrost/midgard/compiler.h +++ b/src/panfrost/midgard/compiler.h @@ -127,9 +127,10 @@ typedef struct midgard_instruction { bool invert; /* Hint for the register allocator not to spill the destination written - * from this instruction (because it is a spill/unspill node itself) */ + * from this instruction (because it is a spill/unspill node itself). + * Bitmask of spilled classes */ - bool no_spill; + unsigned no_spill; /* Generic hint for intra-pass use */ bool hint; @@ -565,6 +566,14 @@ v_mov(unsigned src, unsigned dest) return ins; } +/* Broad types of register classes so we can handle special + * registers */ + +#define REG_CLASS_WORK 0 +#define REG_CLASS_LDST 1 +#define REG_CLASS_TEXR 3 +#define REG_CLASS_TEXW 4 + /* Like a move, but to thread local storage! */ static inline midgard_instruction @@ -592,7 +601,7 @@ v_load_store_scratch( }, /* If we spill an unspill, RA goes into an infinite loop */ - .no_spill = true + .no_spill = (1 << REG_CLASS_WORK) }; ins.constants[0] = byte; @@ -631,14 +640,6 @@ mir_has_arg(midgard_instruction *ins, unsigned arg) void schedule_program(compiler_context *ctx); -/* Broad types of register classes so we can handle special - * registers */ - -#define REG_CLASS_WORK 0 -#define REG_CLASS_LDST 1 -#define REG_CLASS_TEXR 3 -#define REG_CLASS_TEXW 4 - void mir_ra(compiler_context *ctx); void mir_squeeze_index(compiler_context *ctx); void mir_lower_special_reads(compiler_context *ctx); diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c index d5cfd6214a2..9749ebb9ceb 100644 --- a/src/panfrost/midgard/midgard_ra.c +++ b/src/panfrost/midgard/midgard_ra.c @@ -688,7 +688,7 @@ mir_choose_spill_node( /* We can't spill a previously spilled value or an unspill */ mir_foreach_instr_global(ctx, ins) { - if (ins->no_spill) { + if (ins->no_spill & (1 << l->spill_class)) { lcra_set_node_spill_cost(l, ins->dest, -1); mir_foreach_src(ins, s) @@ -736,10 +736,10 @@ mir_spill_register( if (is_special_w) { st = v_mov(spill_node, spill_slot); - st.no_spill = true; + st.no_spill |= (1 << spill_class); } else { ins->dest = spill_index++; - ins->no_spill = true; + ins->no_spill |= (1 << spill_class); st = v_load_store_scratch(ins->dest, spill_slot, true, ins->mask); } @@ -790,7 +790,7 @@ mir_spill_register( if (is_special) { /* Move */ st = v_mov(spill_node, index); - st.no_spill = true; + st.no_spill |= (1 << spill_class); } else { /* TLS load */ st = v_load_store_scratch(index, spill_slot, false, 0xF); |