diff options
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUISelLowering.cpp | 18 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUISelLowering.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/R600Instructions.td | 7 |
3 files changed, 19 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp index 53f04c57de1..0417273d971 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp @@ -45,6 +45,8 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, default: return Op; case AMDGPUIntrinsic::AMDIL_abs: return LowerIntrinsicIABS(Op, DAG); + case AMDGPUIntrinsic::AMDGPU_lrp: + return LowerIntrinsicLRP(Op, DAG); case AMDGPUIntrinsic::AMDIL_mad: return DAG.getNode(AMDILISD::MAD, DL, VT, Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); @@ -73,6 +75,22 @@ SDValue AMDGPUTargetLowering::LowerIntrinsicIABS(SDValue Op, return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Neg, Op.getOperand(1)); } +/// Linear Interpolation +/// LRP(a, b, c) = muladd(a, b, (1 - a) * c) +SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op, + SelectionDAG &DAG) const +{ + DebugLoc DL = Op.getDebugLoc(); + EVT VT = Op.getValueType(); + SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT, DAG.getConstant(1, VT), + Op.getOperand(1)); + SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA, + Op.getOperand(3)); + return DAG.getNode(AMDILISD::MAD, DL, VT, Op.getOperand(1), + Op.getOperand(2), + OneSubAC); +} + void AMDGPUTargetLowering::addLiveIn(MachineInstr * MI, MachineFunction * MF, MachineRegisterInfo & MRI, const TargetInstrInfo * TII, unsigned reg) const diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.h b/src/gallium/drivers/radeon/AMDGPUISelLowering.h index e4c778787a2..3e5e81bfef5 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.h +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.h @@ -41,6 +41,7 @@ public: virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const; virtual const char* getTargetNodeName(unsigned Opcode) const; }; diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index df2d56bbde0..459010c7833 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -672,11 +672,6 @@ class DIV_Common <InstR600 recip_ieee> : Pat< (MUL R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1)) >; -class LRP_Common <InstR600 muladd> : Pat < - (int_AMDGPU_lrp R600_Reg32:$src0, R600_Reg32:$src1, R600_Reg32:$src2), - (muladd R600_Reg32:$src0, R600_Reg32:$src1, (MUL (SUB_f32 ONE, R600_Reg32:$src0), R600_Reg32:$src2)) ->; - class SSG_Common <InstR600 cndgt, InstR600 cndge> : Pat < (int_AMDGPU_ssg R600_Reg32:$src), (cndgt R600_Reg32:$src, (f32 ONE), (cndge R600_Reg32:$src, (f32 ZERO), (f32 NEG_ONE))) @@ -725,7 +720,6 @@ let Gen = AMDGPUGen.R600 in { } // End AMDGPUGen.R600 def DIV_r600 : DIV_Common<RECIP_IEEE_r600>; - def LRP_r600 : LRP_Common<MULADD_r600>; def POW_r600 : POW_Common<LOG_IEEE_r600, EXP_IEEE_r600, MUL, GPRF32>; def SSG_r600 : SSG_Common<CNDGT_r600, CNDGE_r600>; def TGSI_LIT_Z_r600 : TGSI_LIT_Z_Common<MUL_LIT_r600, LOG_CLAMPED_r600, EXP_IEEE_r600>; @@ -904,7 +898,6 @@ let Gen = AMDGPUGen.EG_CAYMAN in { } // End AMDGPUGen.EG_CAYMAN def DIV_eg : DIV_Common<RECIP_IEEE_eg>; - def LRP_eg : LRP_Common<MULADD_eg>; def POW_eg : POW_Common<LOG_IEEE_eg, EXP_IEEE_eg, MUL, GPRF32>; def SSG_eg : SSG_Common<CNDGT_eg, CNDGE_eg>; def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>; |