diff options
| -rw-r--r-- | src/gallium/drivers/panfrost/midgard/midgard_compile.c | 33 |
1 files changed, 27 insertions, 6 deletions
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index 9098727aa15..2b97bbc86f6 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -1134,12 +1134,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) ALU_CASE(isub, isub); ALU_CASE(imul, imul); ALU_CASE(iabs, iabs); - - /* XXX: Use fmov, not imov for now, since NIR does not - * differentiate well (it'll happily emits imov for floats, - * which the hardware rather dislikes and breaks e.g - * -bjellyfish */ - ALU_CASE(imov, fmov); + ALU_CASE(imov, imov); ALU_CASE(feq32, feq); ALU_CASE(fne32, fne); @@ -3236,6 +3231,31 @@ midgard_opt_copy_prop_tex(compiler_context *ctx, midgard_block *block) return progress; } +/* We don't really understand the imov/fmov split, so always use fmov (but let + * it be imov in the IR so we don't do unsafe floating point "optimizations" + * and break things */ + +static void +midgard_imov_workaround(compiler_context *ctx, midgard_block *block) +{ + mir_foreach_instr_in_block_safe(block, ins) { + if (ins->type != TAG_ALU_4) continue; + if (ins->alu.op != midgard_alu_op_imov) continue; + + ins->alu.op = midgard_alu_op_fmov; + ins->alu.outmod = midgard_outmod_none; + + /* Remove flags that don't make sense */ + + midgard_vector_alu_src s = + vector_alu_from_unsigned(ins->alu.src2); + + s.mod = 0; + + ins->alu.src2 = vector_alu_srco_unsigned(s); + } +} + /* The following passes reorder MIR instructions to enable better scheduling */ static void @@ -3487,6 +3507,7 @@ emit_block(compiler_context *ctx, nir_block *block) midgard_emit_store(ctx, this_block); midgard_pair_load_store(ctx, this_block); + midgard_imov_workaround(ctx, this_block); /* Append fragment shader epilogue (value writeout) */ if (ctx->stage == MESA_SHADER_FRAGMENT) { |