diff options
| -rw-r--r-- | src/amd/common/ac_rtld.c | 4 | ||||
| -rw-r--r-- | src/amd/common/ac_rtld.h | 3 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 2 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_shader.c | 6 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_shader.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 2 |
6 files changed, 14 insertions, 4 deletions
diff --git a/src/amd/common/ac_rtld.c b/src/amd/common/ac_rtld.c index a1bb51a8a88..7c35e72543d 100644 --- a/src/amd/common/ac_rtld.c +++ b/src/amd/common/ac_rtld.c @@ -271,6 +271,7 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, uint64_t pasted_text_size = 0; uint64_t rx_align = 1; uint64_t rx_size = 0; + uint64_t exec_size = 0; #define report_if(cond) \ do { \ @@ -370,6 +371,8 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, if (!strcmp(s->name, ".text")) s->is_pasted_text = true; + + exec_size += shdr->sh_size; } if (s->is_pasted_text) { @@ -438,6 +441,7 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, } binary->rx_size += rx_size; + binary->exec_size = exec_size; if (i.info->chip_class >= GFX10) { /* In gfx10, the SQ fetches up to 3 cache lines of 16 dwords diff --git a/src/amd/common/ac_rtld.h b/src/amd/common/ac_rtld.h index 55faaa011db..2246cf1208a 100644 --- a/src/amd/common/ac_rtld.h +++ b/src/amd/common/ac_rtld.h @@ -57,6 +57,9 @@ struct ac_rtld_binary { /* Required buffer sizes, currently read/executable only. */ uint64_t rx_size; + /* Size of executable code, for reporting purposes. */ + uint64_t exec_size; + uint64_t rx_end_markers; unsigned num_parts; diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 0897b2d153e..d387e56c60b 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -5025,7 +5025,7 @@ VkResult radv_GetPipelineExecutableStatisticsKHR( desc_copy(s->name, "Code size"); desc_copy(s->description, "Code size in bytes"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; - s->value.u64 = shader->code_size; + s->value.u64 = shader->exec_size; } ++s; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index e907c04863a..b6de97deb24 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -941,10 +941,12 @@ radv_shader_variant_create(struct radv_device *device, } variant->code_size = rtld_binary.rx_size; + variant->exec_size = rtld_binary.exec_size; } else { assert(binary->type == RADV_BINARY_TYPE_LEGACY); config = ((struct radv_shader_binary_legacy *)binary)->config; - variant->code_size = radv_get_shader_binary_size(((struct radv_shader_binary_legacy *)binary)->code_size); + variant->code_size = radv_get_shader_binary_size(((struct radv_shader_binary_legacy *)binary)->code_size); + variant->exec_size = variant->code_size; } variant->info = binary->variant_info; @@ -1299,7 +1301,7 @@ generate_shader_stats(struct radv_device *device, "********************\n\n\n", conf->num_sgprs, conf->num_vgprs, conf->spilled_sgprs, conf->spilled_vgprs, - variant->info.private_mem_vgprs, variant->code_size, + variant->info.private_mem_vgprs, variant->exec_size, conf->lds_size, conf->scratch_bytes_per_wave, max_simd_waves); } diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 67c45a0f0bd..9d18d4410c1 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -350,6 +350,7 @@ struct radv_shader_variant { uint64_t bo_offset; struct ac_shader_config config; uint32_t code_size; + uint32_t exec_size; struct radv_shader_variant_info info; /* debug only */ diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index cd75c084043..7636d44bee4 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -5286,7 +5286,7 @@ static unsigned si_get_shader_binary_size(struct si_screen *screen, struct si_sh { struct ac_rtld_binary rtld; si_shader_binary_open(screen, shader, &rtld); - return rtld.rx_size; + return rtld.exec_size; } static bool si_get_external_symbol(void *data, const char *name, uint64_t *value) |