diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_reg.h | 27 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 |
4 files changed, 22 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 4f6f3a32b97..3b50a82f94e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1010,7 +1010,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_set_default_access_mode(p, BRW_ALIGN_1); - if (memcmp(&surface_reg, &sampler_reg, sizeof(surface_reg)) == 0) { + if (brw_regs_equal(&surface_reg, &sampler_reg)) { brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101)); } else { brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h index 6d51623960d..71e1024428a 100644 --- a/src/mesa/drivers/dri/i965/brw_reg.h +++ b/src/mesa/drivers/dri/i965/brw_reg.h @@ -234,14 +234,19 @@ uint32_t brw_swizzle_immediate(enum brw_reg_type type, uint32_t x, unsigned swz) * or "structure of array" form: */ struct brw_reg { - enum brw_reg_type type:4; - enum brw_reg_file file:3; /* :2 hardware format */ - unsigned negate:1; /* source only */ - unsigned abs:1; /* source only */ - unsigned address_mode:1; /* relative addressing, hopefully! */ - unsigned pad0:1; - unsigned subnr:5; /* :1 in align16 */ - unsigned nr:16; + union { + struct { + enum brw_reg_type type:4; + enum brw_reg_file file:3; /* :2 hardware format */ + unsigned negate:1; /* source only */ + unsigned abs:1; /* source only */ + unsigned address_mode:1; /* relative addressing, hopefully! */ + unsigned pad0:1; + unsigned subnr:5; /* :1 in align16 */ + unsigned nr:16; + }; + uint32_t bits; + }; union { struct { @@ -261,6 +266,12 @@ struct brw_reg { }; }; +static inline bool +brw_regs_equal(const struct brw_reg *a, const struct brw_reg *b) +{ + const bool df = a->type == BRW_REGISTER_TYPE_DF && a->file == IMM; + return a->bits == b->bits && (df ? a->df == b->df : a->ud == b->ud); +} struct brw_indirect { unsigned addr_subnr:4; diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index a23f14e8598..d80618f6e6c 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -687,8 +687,7 @@ backend_shader::backend_shader(const struct brw_compiler *compiler, bool backend_reg::equals(const backend_reg &r) const { - return memcmp((brw_reg *)this, (brw_reg *)&r, sizeof(brw_reg)) == 0 && - reg_offset == r.reg_offset; + return brw_regs_equal(this, &r) && reg_offset == r.reg_offset; } bool diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index 4b44c3a63a7..baf442212cc 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -295,7 +295,7 @@ generate_tex(struct brw_codegen *p, brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_set_default_access_mode(p, BRW_ALIGN_1); - if (memcmp(&surface_reg, &sampler_reg, sizeof(surface_reg)) == 0) { + if (brw_regs_equal(&surface_reg, &sampler_reg)) { brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101)); } else { brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); |