diff options
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 33f1f7832ac..cbf8ec7f48d 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -755,14 +755,14 @@ sanitize_ds_state(VkPipelineDepthStencilStateCreateInfo *state, { *stencilWriteEnable = state->stencilTestEnable; - /* If the depth test is disabled, we won't be writing anything. */ - if (!state->depthTestEnable) - state->depthWriteEnable = false; - - /* The Vulkan spec requires that if either depth or stencil is not present, - * the pipeline is to act as if the test silently passes. + /* If the depth test is disabled, we won't be writing anything. Make sure we + * treat the test as always passing later on as well. + * + * Also, the Vulkan spec requires that if either depth or stencil is not + * present, the pipeline is to act as if the test silently passes. In that + * case we won't write either. */ - if (!(ds_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) { + if (!state->depthTestEnable || !(ds_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) { state->depthWriteEnable = false; state->depthCompareOp = VK_COMPARE_OP_ALWAYS; } |