diff options
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 6 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_state.c | 12 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 5 |
3 files changed, 0 insertions, 23 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 525263174e0..ec1e56fe356 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -799,12 +799,6 @@ iris_init_render_context(struct iris_screen *screen, } iris_emit_lri(batch, HALF_SLICE_CHICKEN7, reg_val); - iris_pack_state(GENX(SLICE_COMMON_ECO_CHICKEN1), ®_val, reg) { - reg.StateCacheRedirectToCSSectionEnable = true; - reg.StateCacheRedirectToCSSectionEnableMask = true; - } - iris_emit_lri(batch, SLICE_COMMON_ECO_CHICKEN1, reg_val); - /* Hardware specification recommends disabling repacking for the * compatibility with decompression mechanism in display controller. */ diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 3bf4890b4a4..df76b33a7c3 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -273,18 +273,6 @@ genX(init_device_state)(struct anv_device *device) lri.DataDWord = half_slice_chicken7; } - /* WaEnableStateCacheRedirectToCS:icl */ - uint32_t slice_common_eco_chicken1; - anv_pack_struct(&slice_common_eco_chicken1, - GENX(SLICE_COMMON_ECO_CHICKEN1), - .StateCacheRedirectToCSSectionEnable = true, - .StateCacheRedirectToCSSectionEnableMask = true); - - anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) { - lri.RegisterOffset = GENX(SLICE_COMMON_ECO_CHICKEN1_num); - lri.DataDWord = slice_common_eco_chicken1; - } - #endif genX(emit_slice_hashing_state)(device, &batch); diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 87550425fc7..87e459376a8 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -189,11 +189,6 @@ brw_upload_initial_gpu_state(struct brw_context *brw) */ brw_load_register_imm32(brw, GEN8_L3CNTLREG, GEN8_L3CNTLREG_EDBC_NO_HANG); - - /* WaEnableStateCacheRedirectToCS:icl */ - brw_load_register_imm32(brw, SLICE_COMMON_ECO_CHICKEN1, - GEN11_STATE_CACHE_REDIRECT_TO_CS_SECTION_ENABLE | - REG_MASK(GEN11_STATE_CACHE_REDIRECT_TO_CS_SECTION_ENABLE)); } /* hardware specification recommends disabling repacking for |