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-rw-r--r--src/panfrost/midgard/midgard_schedule.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c
index dfc02f1c337..ddd5edd7c84 100644
--- a/src/panfrost/midgard/midgard_schedule.c
+++ b/src/panfrost/midgard/midgard_schedule.c
@@ -753,6 +753,8 @@ mir_schedule_alu(
unreachable("Bad condition");
}
+ mir_choose_alu(&smul, instructions, worklist, len, &predicate, UNIT_SMUL);
+
if (!writeout)
mir_choose_alu(&vlut, instructions, worklist, len, &predicate, UNIT_VLUT);
@@ -777,6 +779,9 @@ mir_schedule_alu(
unreachable("Bad condition");
}
+ /* Stage 2, let's schedule sadd before vmul for writeout */
+ mir_choose_alu(&sadd, instructions, worklist, len, &predicate, UNIT_SADD);
+
/* Check if writeout reads its own register */
bool bad_writeout = false;