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-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c4
-rw-r--r--src/mesa/tnl/t_vertex_generic.c2
-rw-r--r--src/mesa/tnl/t_vertex_sse.c12
4 files changed, 18 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index d1b0dcdf319..d53e2cbd5aa 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -295,6 +295,13 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
wt == GL_CLAMP_TO_BORDER || wr == GL_CLAMP_TO_BORDER))
return GL_FALSE;
+ /* Only support TEXCOORDMODE_CLAMP_EDGE and TEXCOORDMODE_CUBE (not
+ * used) when using cube map texture coordinates
+ */
+ if (tObj->Target == GL_TEXTURE_CUBE_MAP_ARB &&
+ (((ws != GL_CLAMP) && (ws != GL_CLAMP_TO_EDGE)) ||
+ ((wr != GL_CLAMP) && (wr != GL_CLAMP_TO_EDGE))))
+ return GL_FALSE;
state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index b96ba72853e..c677ddd63c5 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -111,9 +111,9 @@ intel_miptree_create(struct intel_context *intel,
first_level, last_level, width0,
height0, depth0, cpp, compress_byte);
/*
- * pitch == 0 indicates the null texture
+ * pitch == 0 || height == 0 indicates the null texture
*/
- if (!mt || !mt->pitch)
+ if (!mt || !mt->pitch || !mt->total_height)
return NULL;
mt->region = intel_region_alloc(intel,
diff --git a/src/mesa/tnl/t_vertex_generic.c b/src/mesa/tnl/t_vertex_generic.c
index f763522f91f..9812f8c8081 100644
--- a/src/mesa/tnl/t_vertex_generic.c
+++ b/src/mesa/tnl/t_vertex_generic.c
@@ -113,7 +113,7 @@ static INLINE void insert_3f_viewport_2( const struct tnl_clipspace_attr *a, GLu
DEBUG_INSERT;
out[0] = vp[0] * in[0] + vp[12];
out[1] = vp[5] * in[1] + vp[13];
- out[2] = vp[10] * in[2] + vp[14];
+ out[2] = vp[14];
}
static INLINE void insert_3f_viewport_1( const struct tnl_clipspace_attr *a, GLubyte *v,
diff --git a/src/mesa/tnl/t_vertex_sse.c b/src/mesa/tnl/t_vertex_sse.c
index 76043bd1b54..7a255d680a1 100644
--- a/src/mesa/tnl/t_vertex_sse.c
+++ b/src/mesa/tnl/t_vertex_sse.c
@@ -146,7 +146,8 @@ static void emit_load3f_1( struct x86_program *p,
struct x86_reg dest,
struct x86_reg arg0 )
{
- emit_load4f_1(p, dest, arg0);
+ /* Loading from memory erases the upper bits. */
+ sse_movss(&p->func, dest, arg0);
}
static void emit_load2f_2( struct x86_program *p,
@@ -160,7 +161,8 @@ static void emit_load2f_1( struct x86_program *p,
struct x86_reg dest,
struct x86_reg arg0 )
{
- emit_load4f_1(p, dest, arg0);
+ /* Loading from memory erases the upper bits. */
+ sse_movss(&p->func, dest, arg0);
}
static void emit_load1f_1( struct x86_program *p,
@@ -352,6 +354,7 @@ static GLboolean build_vertex_emit( struct x86_program *p )
struct x86_reg temp = x86_make_reg(file_XMM, 0);
struct x86_reg vp0 = x86_make_reg(file_XMM, 1);
struct x86_reg vp1 = x86_make_reg(file_XMM, 2);
+ struct x86_reg temp2 = x86_make_reg(file_XMM, 3);
GLubyte *fixup, *label;
/* Push a few regs?
@@ -524,7 +527,8 @@ static GLboolean build_vertex_emit( struct x86_program *p )
sse_shufps(&p->func, temp, temp, SHUF(W,X,Y,Z));
get_src_ptr(p, srcECX, vtxESI, &a[1]);
- emit_load(p, temp, 1, x86_deref(srcECX), a[1].inputsize);
+ emit_load(p, temp2, 1, x86_deref(srcECX), a[1].inputsize);
+ sse_movss(&p->func, temp, temp2);
update_src_ptr(p, srcECX, vtxESI, &a[1]);
/* Rearrange and possibly do BGR conversion:
@@ -539,8 +543,8 @@ static GLboolean build_vertex_emit( struct x86_program *p )
}
else {
_mesa_printf("Can't emit 3ub\n");
+ return GL_FALSE; /* add this later */
}
- return GL_FALSE; /* add this later */
break;
case EMIT_4UB_4F_RGBA: