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-rw-r--r--src/intel/isl/gen_format_layout.py1
-rw-r--r--src/intel/isl/isl.c11
-rw-r--r--src/intel/isl/isl.h5
-rw-r--r--src/intel/isl/isl_gen9.c14
-rw-r--r--src/intel/isl/isl_storage_image.c4
-rw-r--r--src/intel/vulkan/anv_image.c4
-rw-r--r--src/intel/vulkan/anv_meta_copy.c4
7 files changed, 21 insertions, 22 deletions
diff --git a/src/intel/isl/gen_format_layout.py b/src/intel/isl/gen_format_layout.py
index 803967ec490..c9163fed194 100644
--- a/src/intel/isl/gen_format_layout.py
+++ b/src/intel/isl/gen_format_layout.py
@@ -68,7 +68,6 @@ TEMPLATE = template.Template(
.format = ISL_FORMAT_${format.name},
.name = "ISL_FORMAT_${format.name}",
.bpb = ${format.bpb},
- .bs = ${format.bpb // 8},
.bw = ${format.bw},
.bh = ${format.bh},
.bd = ${format.bd},
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f6c9200674c..aaf4d1c8c77 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -904,7 +904,8 @@ isl_calc_linear_row_pitch(const struct isl_device *dev,
* being used to determine whether additional pages need to be defined.
*/
assert(phys_slice0_sa->w % fmtl->bw == 0);
- row_pitch = MAX(row_pitch, fmtl->bs * (phys_slice0_sa->w / fmtl->bw));
+ const uint32_t bs = fmtl->bpb / 8;
+ row_pitch = MAX(row_pitch, bs * (phys_slice0_sa->w / fmtl->bw));
/* From the Broadwel PRM >> Volume 2d: Command Reference: Structures >>
* RENDER_SURFACE_STATE Surface Pitch (p349):
@@ -922,9 +923,9 @@ isl_calc_linear_row_pitch(const struct isl_device *dev,
*/
if (info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) {
if (isl_format_is_yuv(info->format)) {
- row_pitch = isl_align_npot(row_pitch, 2 * fmtl->bs);
+ row_pitch = isl_align_npot(row_pitch, 2 * bs);
} else {
- row_pitch = isl_align_npot(row_pitch, fmtl->bs);
+ row_pitch = isl_align_npot(row_pitch, bs);
}
}
@@ -1120,9 +1121,9 @@ isl_surf_init_s(const struct isl_device *dev,
base_alignment = MAX(1, info->min_alignment);
if (info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) {
if (isl_format_is_yuv(info->format)) {
- base_alignment = MAX(base_alignment, 2 * fmtl->bs);
+ base_alignment = MAX(base_alignment, fmtl->bpb / 4);
} else {
- base_alignment = MAX(base_alignment, fmtl->bs);
+ base_alignment = MAX(base_alignment, fmtl->bpb / 8);
}
}
} else {
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 5c697a64d5e..a86688c91bc 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -640,7 +640,6 @@ struct isl_format_layout {
const char *name;
uint16_t bpb; /**< Bits per block */
- uint8_t bs; /**< Block size, in bytes, rounded towards 0 */
uint8_t bw; /**< Block width, in pixels */
uint8_t bh; /**< Block height, in pixels */
uint8_t bd; /**< Block depth, in pixels */
@@ -1203,8 +1202,8 @@ isl_surf_get_row_pitch_el(const struct isl_surf *surf)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
- assert(surf->row_pitch % fmtl->bs == 0);
- return surf->row_pitch / fmtl->bs;
+ assert(surf->row_pitch % (fmtl->bpb / 8) == 0);
+ return surf->row_pitch / (fmtl->bpb / 8);
}
/**
diff --git a/src/intel/isl/isl_gen9.c b/src/intel/isl/isl_gen9.c
index aa290aa1c35..39f409245cd 100644
--- a/src/intel/isl/isl_gen9.c
+++ b/src/intel/isl/isl_gen9.c
@@ -40,7 +40,7 @@ gen9_calc_std_image_alignment_sa(const struct isl_device *dev,
assert(isl_tiling_is_std_y(tiling));
- const uint32_t bs = fmtl->bs;
+ const uint32_t bpb = fmtl->bpb;
const uint32_t is_Ys = tiling == ISL_TILING_Ys;
switch (info->dim) {
@@ -49,7 +49,7 @@ gen9_calc_std_image_alignment_sa(const struct isl_device *dev,
* Layout and Tiling > 1D Surfaces > 1D Alignment Requirements.
*/
*align_sa = (struct isl_extent3d) {
- .w = 1 << (12 - (ffs(bs) - 1) + (4 * is_Ys)),
+ .w = 1 << (12 - (ffs(bpb) - 4) + (4 * is_Ys)),
.h = 1,
.d = 1,
};
@@ -60,8 +60,8 @@ gen9_calc_std_image_alignment_sa(const struct isl_device *dev,
* Requirements.
*/
*align_sa = (struct isl_extent3d) {
- .w = 1 << (6 - ((ffs(bs) - 1) / 2) + (4 * is_Ys)),
- .h = 1 << (6 - ((ffs(bs) - 0) / 2) + (4 * is_Ys)),
+ .w = 1 << (6 - ((ffs(bpb) - 4) / 2) + (4 * is_Ys)),
+ .h = 1 << (6 - ((ffs(bpb) - 3) / 2) + (4 * is_Ys)),
.d = 1,
};
@@ -86,9 +86,9 @@ gen9_calc_std_image_alignment_sa(const struct isl_device *dev,
* Layout and Tiling > 1D Surfaces > 1D Alignment Requirements.
*/
*align_sa = (struct isl_extent3d) {
- .w = 1 << (4 - ((ffs(bs) + 1) / 3) + (4 * is_Ys)),
- .h = 1 << (4 - ((ffs(bs) - 1) / 3) + (2 * is_Ys)),
- .d = 1 << (4 - ((ffs(bs) - 0) / 3) + (2 * is_Ys)),
+ .w = 1 << (4 - ((ffs(bpb) - 2) / 3) + (4 * is_Ys)),
+ .h = 1 << (4 - ((ffs(bpb) - 4) / 3) + (2 * is_Ys)),
+ .d = 1 << (4 - ((ffs(bpb) - 3) / 3) + (2 * is_Ys)),
};
return;
}
diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c
index 2617eb0eaff..01d388180d6 100644
--- a/src/intel/isl/isl_storage_image.c
+++ b/src/intel/isl/isl_storage_image.c
@@ -229,7 +229,7 @@ isl_surf_fill_image_param(const struct isl_device *dev,
isl_surf_get_image_offset_el(surf, view->base_level, view->base_array_layer,
0, &param->offset[0], &param->offset[1]);
- const int cpp = isl_format_get_layout(surf->format)->bs;
+ const int cpp = isl_format_get_layout(surf->format)->bpb / 8;
param->stride[0] = cpp;
param->stride[1] = surf->row_pitch / cpp;
@@ -301,6 +301,6 @@ isl_buffer_fill_image_param(const struct isl_device *dev,
{
*param = image_param_defaults;
- param->stride[0] = isl_format_layouts[format].bs;
+ param->stride[0] = isl_format_layouts[format].bpb / 8;
param->size[0] = size / param->stride[0];
}
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 77d99313135..23fdd936846 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -639,7 +639,7 @@ void anv_buffer_view_init(struct anv_buffer_view *view,
anv_fill_buffer_surface_state(device, view->surface_state,
view->format,
view->offset, view->range,
- isl_format_get_layout(view->format)->bs);
+ isl_format_get_layout(view->format)->bpb / 8);
} else {
view->surface_state = (struct anv_state){ 0 };
}
@@ -657,7 +657,7 @@ void anv_buffer_view_init(struct anv_buffer_view *view,
storage_format,
view->offset, view->range,
(storage_format == ISL_FORMAT_RAW ? 1 :
- isl_format_get_layout(storage_format)->bs));
+ isl_format_get_layout(storage_format)->bpb / 8));
isl_buffer_fill_image_param(&device->isl_dev,
&view->storage_image_param,
diff --git a/src/intel/vulkan/anv_meta_copy.c b/src/intel/vulkan/anv_meta_copy.c
index a5844f0299d..6a9f9c4b9af 100644
--- a/src/intel/vulkan/anv_meta_copy.c
+++ b/src/intel/vulkan/anv_meta_copy.c
@@ -75,7 +75,7 @@ blit_surf_for_image(const struct anv_image* image,
.bo = image->bo,
.tiling = surf->isl.tiling,
.base_offset = image->offset + surf->offset,
- .bs = isl_format_get_layout(surf->isl.format)->bs,
+ .bs = isl_format_get_layout(surf->isl.format)->bpb / 8,
.pitch = isl_surf_get_row_pitch(&surf->isl),
};
}
@@ -168,7 +168,7 @@ meta_copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer,
.bo = buffer->bo,
.tiling = ISL_TILING_LINEAR,
.base_offset = buffer->offset + pRegions[r].bufferOffset,
- .bs = isl_format_get_layout(buf_format)->bs,
+ .bs = isl_format_get_layout(buf_format)->bpb / 8,
.pitch = buf_extent_el.width * buf_bsurf.bs,
};