diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vtbl.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_sol.c | 1 |
3 files changed, 0 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index fbff10b2e44..8587dd0bf94 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1088,7 +1088,6 @@ struct brw_context struct brw_sol_state { uint32_t svbi_0_starting_index; uint32_t svbi_0_max_index; - uint32_t offset_0_batch_start; uint32_t primitives_generated; uint32_t primitives_written; bool counting_primitives_generated; diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 4ca83e4cc51..96a6cd5e7e0 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -197,12 +197,6 @@ static void brw_new_batch( struct intel_context *intel ) brw->state_batch_count = 0; - /* Gen7 needs to track what the real transform feedback vertex count was at - * the start of the batch, since the kernel will be resetting the offset to - * 0. - */ - brw->sol.offset_0_batch_start = brw->sol.svbi_0_starting_index; - brw->ib.type = -1; /* Mark that the current program cache BO has been used by the GPU. diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index bb2dd123930..668a99e503d 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -181,7 +181,6 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode, brw->state.dirty.brw |= BRW_NEW_SOL_INDICES; brw->sol.svbi_0_starting_index = 0; brw->sol.svbi_0_max_index = max_index; - brw->sol.offset_0_batch_start = 0; if (intel->gen >= 7) { /* Reset the SOL buffer offset register. */ |