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-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c24
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h1
2 files changed, 15 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index f06b8ddb79b..4c79dfeb52b 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -133,22 +133,26 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
uint64_t remaining_size, unsigned user_flags,
bool *is_first, unsigned *packet_flags)
{
- /* Count memory usage in so that need_cs_space can take it into account. */
- r600_context_add_resource_size(&sctx->b.b, dst);
- if (src)
- r600_context_add_resource_size(&sctx->b.b, src);
+ if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) {
+ /* Count memory usage in so that need_cs_space can take it into account. */
+ r600_context_add_resource_size(&sctx->b.b, dst);
+ if (src)
+ r600_context_add_resource_size(&sctx->b.b, src);
+ }
if (!(user_flags & SI_CPDMA_SKIP_CHECK_CS_SPACE))
si_need_cs_space(sctx);
/* This must be done after need_cs_space. */
- radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
- (struct r600_resource*)dst,
- RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA);
- if (src)
+ if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) {
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
- (struct r600_resource*)src,
- RADEON_USAGE_READ, RADEON_PRIO_CP_DMA);
+ (struct r600_resource*)dst,
+ RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA);
+ if (src)
+ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+ (struct r600_resource*)src,
+ RADEON_USAGE_READ, RADEON_PRIO_CP_DMA);
+ }
/* Flush the caches for the first copy only.
* Also wait for the previous CP DMA operations.
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index cecbc3b91c3..64218eee31b 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -372,6 +372,7 @@ void si_resource_copy_region(struct pipe_context *ctx,
#define SI_CPDMA_SKIP_SYNC_AFTER (1 << 1) /* don't wait for DMA after the copy */
#define SI_CPDMA_SKIP_SYNC_BEFORE (1 << 2) /* don't wait for DMA before the copy (RAW hazards) */
#define SI_CPDMA_SKIP_GFX_SYNC (1 << 3) /* don't flush caches and don't wait for PS/CS */
+#define SI_CPDMA_SKIP_BO_LIST_UPDATE (1 << 4) /* don't update the BO list */
void si_copy_buffer(struct si_context *sctx,
struct pipe_resource *dst, struct pipe_resource *src,