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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h22
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_surface_state.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
5 files changed, 27 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index b3d297deae6..22a6826420f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -132,7 +132,9 @@ enum brw_state_id {
BRW_STATE_WM_INPUT_DIMENSIONS,
BRW_STATE_PSP,
BRW_STATE_WM_SURFACES,
- BRW_STATE_BINDING_TABLE,
+ BRW_STATE_VS_BINDING_TABLE,
+ BRW_STATE_GS_BINDING_TABLE,
+ BRW_STATE_PS_BINDING_TABLE,
BRW_STATE_INDICES,
BRW_STATE_VERTICES,
BRW_STATE_BATCH,
@@ -155,21 +157,23 @@ enum brw_state_id {
#define BRW_NEW_WM_INPUT_DIMENSIONS (1 << BRW_STATE_WM_INPUT_DIMENSIONS)
#define BRW_NEW_PSP (1 << BRW_STATE_PSP)
#define BRW_NEW_WM_SURFACES (1 << BRW_STATE_WM_SURFACES)
-#define BRW_NEW_BINDING_TABLE (1 << BRW_STATE_BINDING_TABLE)
+#define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
+#define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
+#define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
#define BRW_NEW_INDICES (1 << BRW_STATE_INDICES)
#define BRW_NEW_VERTICES (1 << BRW_STATE_VERTICES)
/**
* Used for any batch entry with a relocated pointer that will be used
* by any 3D rendering.
*/
-#define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
+#define BRW_NEW_BATCH (1 << BRW_STATE_BATCH)
/** \see brw.state.depth_region */
-#define BRW_NEW_DEPTH_BUFFER (1 << BRW_STATE_DEPTH_BUFFER)
-#define BRW_NEW_NR_WM_SURFACES (1 << BRW_STATE_NR_WM_SURFACES)
-#define BRW_NEW_NR_VS_SURFACES (1 << BRW_STATE_NR_VS_SURFACES)
-#define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
-#define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
-#define BRW_NEW_WM_CONSTBUF (1 << BRW_STATE_WM_CONSTBUF)
+#define BRW_NEW_DEPTH_BUFFER (1 << BRW_STATE_DEPTH_BUFFER)
+#define BRW_NEW_NR_WM_SURFACES (1 << BRW_STATE_NR_WM_SURFACES)
+#define BRW_NEW_NR_VS_SURFACES (1 << BRW_STATE_NR_VS_SURFACES)
+#define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
+#define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
+#define BRW_NEW_WM_CONSTBUF (1 << BRW_STATE_WM_CONSTBUF)
struct brw_state_flags {
/** State update flags signalled by mesa internals */
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 7119786de42..ed6a09d861b 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -86,7 +86,10 @@ static void upload_binding_table_pointers(struct brw_context *brw)
const struct brw_tracked_state brw_binding_table_pointers = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_BATCH | BRW_NEW_BINDING_TABLE,
+ .brw = BRW_NEW_BATCH
+ | BRW_NEW_VS_BINDING_TABLE
+ | BRW_NEW_GS_BINDING_TABLE
+ | BRW_NEW_PS_BINDING_TABLE,
.cache = 0,
},
.emit = upload_binding_table_pointers,
@@ -118,7 +121,10 @@ static void upload_gen6_binding_table_pointers(struct brw_context *brw)
const struct brw_tracked_state gen6_binding_table_pointers = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_BATCH | BRW_NEW_BINDING_TABLE,
+ .brw = BRW_NEW_BATCH
+ | BRW_NEW_VS_BINDING_TABLE
+ | BRW_NEW_GS_BINDING_TABLE
+ | BRW_NEW_PS_BINDING_TABLE,
.cache = 0,
},
.emit = upload_gen6_binding_table_pointers,
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 062d98e4195..6684cdc278b 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -370,7 +370,6 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
DEFINE_BIT(BRW_NEW_PSP),
DEFINE_BIT(BRW_NEW_WM_SURFACES),
- DEFINE_BIT(BRW_NEW_BINDING_TABLE),
DEFINE_BIT(BRW_NEW_INDICES),
DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VERTICES),
@@ -380,6 +379,9 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
{0, 0, 0}
};
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 48cf265e51b..2b9b63590a0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -165,7 +165,7 @@ static void upload_vs_surfaces(struct brw_context *brw)
/* BRW_NEW_NR_VS_SURFACES */
if (brw->vs.nr_surfaces == 0) {
if (brw->vs.bind_bo_offset) {
- brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+ brw->state.dirty.brw |= BRW_NEW_VS_BINDING_TABLE;
}
brw->vs.bind_bo_offset = 0;
return;
@@ -184,7 +184,7 @@ static void upload_vs_surfaces(struct brw_context *brw)
bind[i] = brw->vs.surf_offset[i];
}
- brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+ brw->state.dirty.brw |= BRW_NEW_VS_BINDING_TABLE;
}
const struct brw_tracked_state brw_vs_surfaces = {
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 47b8b511f05..e3e035a97ec 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -664,7 +664,7 @@ brw_wm_upload_binding_table(struct brw_context *brw)
bind[i] = brw->wm.surf_offset[i];
}
- brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+ brw->state.dirty.brw |= BRW_NEW_PS_BINDING_TABLE;
}
const struct brw_tracked_state brw_wm_binding_table = {