diff options
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_state.c | 17 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/evergreend.h | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 6 |
3 files changed, 23 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 3f4ee8e952f..98dbb2f5e69 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1434,10 +1434,15 @@ static void evergreen_init_depth_surface(struct r600_context *rctx, stencil_offset >>= 8; surf->db_stencil_base = stencil_offset; - surf->db_stencil_info = 1 | S_028044_TILE_SPLIT(stile_split); + surf->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8) | + S_028044_TILE_SPLIT(stile_split); } else { surf->db_stencil_base = offset; - surf->db_stencil_info = 1; + /* DRM 2.6.18 allows the INVALID format to disable stencil. + * Older kernels are out of luck. */ + surf->db_stencil_info = rctx->screen->info.drm_minor >= 18 ? + S_028044_FORMAT(V_028044_STENCIL_INVALID) : + S_028044_FORMAT(V_028044_STENCIL_8); } surf->depth_initialized = true; @@ -1575,6 +1580,8 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.atom.num_dw += 21; if (rctx->keep_tiling_flags) rctx->framebuffer.atom.num_dw += 2; + } else if (rctx->screen->info.drm_minor >= 18) { + rctx->framebuffer.atom.num_dw += 4; } r600_atom_dirty(rctx, &rctx->framebuffer.atom); @@ -1903,6 +1910,12 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r r600_write_value(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028054_DB_STENCIL_WRITE_BASE */ r600_write_value(cs, reloc); + } else if (rctx->screen->info.drm_minor >= 18) { + /* DRM 2.6.18 allows the INVALID format to disable depth/stencil. + * Older kernels are out of luck. */ + r600_write_context_reg_seq(cs, R_028040_DB_Z_INFO, 2); + r600_write_value(cs, S_028040_FORMAT(V_028040_Z_INVALID)); /* R_028040_DB_Z_INFO */ + r600_write_value(cs, S_028044_FORMAT(V_028044_STENCIL_INVALID)); /* R_028044_DB_STENCIL_INFO */ } /* Framebuffer dimensions. */ diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index cb891997d30..3dff6f93149 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -567,6 +567,8 @@ #define R_028044_DB_STENCIL_INFO 0x028044 #define S_028044_FORMAT(x) (((x) & 0x1) << 0) +#define V_028044_STENCIL_INVALID 0 +#define V_028044_STENCIL_8 1 #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) #define C_028044_FORMAT 0xFFFFFFFE #define S_028044_TILE_SPLIT(x) (((x) & 0x7) << 8) diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 17ab259c55d..1b7869c3e65 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1552,6 +1552,8 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, } if (rctx->framebuffer.state.zsbuf) { rctx->framebuffer.atom.num_dw += 13; + } else if (rctx->screen->info.drm_minor >= 18) { + rctx->framebuffer.atom.num_dw += 3; } if (rctx->family > CHIP_R600 && rctx->family < CHIP_RV770) { rctx->framebuffer.atom.num_dw += 2; @@ -1753,6 +1755,10 @@ static void r600_emit_framebuffer_state(struct r600_context *rctx, struct r600_a r600_write_context_reg(cs, R_028D34_DB_PREFETCH_LIMIT, surf->db_prefetch_limit); sbu |= SURFACE_BASE_UPDATE_DEPTH; + } else if (rctx->screen->info.drm_minor >= 18) { + /* DRM 2.6.18 allows the INVALID format to disable depth/stencil. + * Older kernels are out of luck. */ + r600_write_context_reg(cs, R_028010_DB_DEPTH_INFO, S_028010_FORMAT(V_028010_DEPTH_INVALID)); } /* SURFACE_BASE_UPDATE */ |