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-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_pipe.c2
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_shader.c6
2 files changed, 1 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 744dac4be0c..acf3e2d77a1 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -456,7 +456,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
/* FIXME Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
- return 64;
+ return 4096; /* actually only memory limits this */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_PREDS:
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 1556a0768b1..7e61560369d 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -455,12 +455,6 @@ static LLVMValueRef fetch_constant(
* CONST[0].x will have an offset of 0 and CONST[1].x will have an
* offset of 4. */
idx = (reg->Register.Index * 4) + swizzle;
-
- /* index loads above 255 are currently not supported */
- if (idx > 255) {
- assert(0);
- idx = 0;
- }
offset = lp_build_const_int32(base->gallivm, idx);
load = build_indexed_load(base->gallivm, const_ptr, offset);