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-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c65
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.h6
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c56
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.h13
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_validate.c6
5 files changed, 55 insertions, 91 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 663575fc62b..1640590b962 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -948,9 +948,9 @@ intel_miptree_alloc_mcs(struct intel_context *intel,
*
* Note: the clear value for MCS buffers is all 1's, so we memset to 0xff.
*/
- void *data = intel_region_map(intel, mt->mcs_mt->region, 0);
+ void *data = intel_miptree_map_raw(intel, mt->mcs_mt);
memset(data, 0xff, mt->mcs_mt->region->bo->size);
- intel_region_unmap(intel, mt->mcs_mt->region);
+ intel_miptree_unmap_raw(intel, mt->mcs_mt);
return mt->mcs_mt;
}
@@ -1192,6 +1192,34 @@ intel_miptree_upsample(struct intel_context *intel,
intel_miptree_slice_set_needs_hiz_resolve(mt, 0, 0);
}
+void *
+intel_miptree_map_raw(struct intel_context *intel, struct intel_mipmap_tree *mt)
+{
+ drm_intel_bo *bo = mt->region->bo;
+
+ if (unlikely(INTEL_DEBUG & DEBUG_PERF)) {
+ if (drm_intel_bo_busy(bo)) {
+ perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
+ }
+ }
+
+ intel_flush(&intel->ctx);
+
+ if (mt->region->tiling != I915_TILING_NONE)
+ drm_intel_gem_bo_map_gtt(bo);
+ else
+ drm_intel_bo_map(bo, true);
+
+ return bo->virtual;
+}
+
+void
+intel_miptree_unmap_raw(struct intel_context *intel,
+ struct intel_mipmap_tree *mt)
+{
+ drm_intel_bo_unmap(mt->region->bo);
+}
+
static void
intel_miptree_map_gtt(struct intel_context *intel,
struct intel_mipmap_tree *mt,
@@ -1212,7 +1240,7 @@ intel_miptree_map_gtt(struct intel_context *intel,
assert(y % bh == 0);
y /= bh;
- base = intel_region_map(intel, mt->region, map->mode) + mt->offset;
+ base = intel_miptree_map_raw(intel, mt) + mt->offset;
if (base == NULL)
map->ptr = NULL;
@@ -1241,7 +1269,7 @@ intel_miptree_unmap_gtt(struct intel_context *intel,
unsigned int level,
unsigned int slice)
{
- intel_region_unmap(intel, mt->region);
+ intel_miptree_unmap_raw(intel, mt);
}
static void
@@ -1336,8 +1364,7 @@ intel_miptree_map_s8(struct intel_context *intel,
*/
if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) {
uint8_t *untiled_s8_map = map->ptr;
- uint8_t *tiled_s8_map = intel_region_map(intel, mt->region,
- GL_MAP_READ_BIT);
+ uint8_t *tiled_s8_map = intel_miptree_map_raw(intel, mt);
unsigned int image_x, image_y;
intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
@@ -1352,7 +1379,7 @@ intel_miptree_map_s8(struct intel_context *intel,
}
}
- intel_region_unmap(intel, mt->region);
+ intel_miptree_unmap_raw(intel, mt);
DBG("%s: %d,%d %dx%d from mt %p %d,%d = %p/%d\n", __FUNCTION__,
map->x, map->y, map->w, map->h,
@@ -1374,7 +1401,7 @@ intel_miptree_unmap_s8(struct intel_context *intel,
if (map->mode & GL_MAP_WRITE_BIT) {
unsigned int image_x, image_y;
uint8_t *untiled_s8_map = map->ptr;
- uint8_t *tiled_s8_map = intel_region_map(intel, mt->region, map->mode);
+ uint8_t *tiled_s8_map = intel_miptree_map_raw(intel, mt);
intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
@@ -1388,7 +1415,7 @@ intel_miptree_unmap_s8(struct intel_context *intel,
}
}
- intel_region_unmap(intel, mt->region);
+ intel_miptree_unmap_raw(intel, mt);
}
free(map->buffer);
@@ -1429,7 +1456,7 @@ intel_miptree_unmap_etc(struct intel_context *intel,
image_x += map->x;
image_y += map->y;
- uint8_t *dst = intel_region_map(intel, mt->region, map->mode)
+ uint8_t *dst = intel_miptree_map_raw(intel, mt)
+ image_y * mt->region->pitch
+ image_x * mt->region->cpp;
@@ -1442,7 +1469,7 @@ intel_miptree_unmap_etc(struct intel_context *intel,
map->ptr, map->stride,
map->w, map->h, mt->etc_format);
- intel_region_unmap(intel, mt->region);
+ intel_miptree_unmap_raw(intel, mt);
free(map->buffer);
}
@@ -1480,8 +1507,8 @@ intel_miptree_map_depthstencil(struct intel_context *intel,
*/
if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) {
uint32_t *packed_map = map->ptr;
- uint8_t *s_map = intel_region_map(intel, s_mt->region, GL_MAP_READ_BIT);
- uint32_t *z_map = intel_region_map(intel, z_mt->region, GL_MAP_READ_BIT);
+ uint8_t *s_map = intel_miptree_map_raw(intel, s_mt);
+ uint32_t *z_map = intel_miptree_map_raw(intel, z_mt);
unsigned int s_image_x, s_image_y;
unsigned int z_image_x, z_image_y;
@@ -1512,8 +1539,8 @@ intel_miptree_map_depthstencil(struct intel_context *intel,
}
}
- intel_region_unmap(intel, s_mt->region);
- intel_region_unmap(intel, z_mt->region);
+ intel_miptree_unmap_raw(intel, s_mt);
+ intel_miptree_unmap_raw(intel, z_mt);
DBG("%s: %d,%d %dx%d from z mt %p %d,%d, s mt %p %d,%d = %p/%d\n",
__FUNCTION__,
@@ -1541,8 +1568,8 @@ intel_miptree_unmap_depthstencil(struct intel_context *intel,
if (map->mode & GL_MAP_WRITE_BIT) {
uint32_t *packed_map = map->ptr;
- uint8_t *s_map = intel_region_map(intel, s_mt->region, map->mode);
- uint32_t *z_map = intel_region_map(intel, z_mt->region, map->mode);
+ uint8_t *s_map = intel_miptree_map_raw(intel, s_mt);
+ uint32_t *z_map = intel_miptree_map_raw(intel, z_mt);
unsigned int s_image_x, s_image_y;
unsigned int z_image_x, z_image_y;
@@ -1572,8 +1599,8 @@ intel_miptree_unmap_depthstencil(struct intel_context *intel,
}
}
- intel_region_unmap(intel, s_mt->region);
- intel_region_unmap(intel, z_mt->region);
+ intel_miptree_unmap_raw(intel, s_mt);
+ intel_miptree_unmap_raw(intel, z_mt);
DBG("%s: %d,%d %dx%d from z mt %p (%s) %d,%d, s mt %p %d,%d = %p/%d\n",
__FUNCTION__,
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index 96be87a3598..2de4bc2033a 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -590,6 +590,12 @@ void i945_miptree_layout(struct intel_mipmap_tree *mt);
void brw_miptree_layout(struct intel_context *intel,
struct intel_mipmap_tree *mt);
+void *intel_miptree_map_raw(struct intel_context *intel,
+ struct intel_mipmap_tree *mt);
+
+void intel_miptree_unmap_raw(struct intel_context *intel,
+ struct intel_mipmap_tree *mt);
+
void
intel_miptree_map(struct intel_context *intel,
struct intel_mipmap_tree *mt,
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index cfd5bb9a5fd..eff306b68df 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -104,60 +104,6 @@ debug_backtrace(void)
#endif
-
-
-/* XXX: Thread safety?
- */
-void *
-intel_region_map(struct intel_context *intel, struct intel_region *region,
- GLbitfield mode)
-{
- /* We have the region->map_refcount controlling mapping of the BO because
- * in software fallbacks we may end up mapping the same buffer multiple
- * times on Mesa's behalf, so we refcount our mappings to make sure that
- * the pointer stays valid until the end of the unmap chain. However, we
- * must not emit any batchbuffers between the start of mapping and the end
- * of unmapping, or further use of the map will be incoherent with the GPU
- * rendering done by that batchbuffer. Hence we assert in
- * intel_batchbuffer_flush() that that doesn't happen, which means that the
- * flush is only needed on first map of the buffer.
- */
-
- if (unlikely(intel->perf_debug)) {
- if (drm_intel_bo_busy(region->bo)) {
- perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
- }
- }
-
- _DBG("%s %p\n", __FUNCTION__, region);
- if (!region->map_refcount) {
- intel_flush(&intel->ctx);
-
- if (region->tiling != I915_TILING_NONE)
- drm_intel_gem_bo_map_gtt(region->bo);
- else
- drm_intel_bo_map(region->bo, true);
-
- region->map = region->bo->virtual;
- }
-
- return region->map;
-}
-
-void
-intel_region_unmap(struct intel_context *intel, struct intel_region *region)
-{
- _DBG("%s %p\n", __FUNCTION__, region);
- if (!--region->map_refcount) {
- if (region->tiling != I915_TILING_NONE)
- drm_intel_gem_bo_unmap_gtt(region->bo);
- else
- drm_intel_bo_unmap(region->bo);
-
- region->map = NULL;
- }
-}
-
static struct intel_region *
intel_region_alloc_internal(struct intel_screen *screen,
GLuint cpp,
@@ -291,8 +237,6 @@ intel_region_release(struct intel_region **region_handle)
region->refcount--;
if (region->refcount == 0) {
- assert(region->map_refcount == 0);
-
drm_intel_bo_unreference(region->bo);
free(region);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
index 750b89ba629..56f6ec56bec 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -65,8 +65,6 @@ struct intel_region
GLuint width; /**< in pixels */
GLuint height; /**< in pixels */
GLuint pitch; /**< in bytes */
- GLubyte *map; /**< only non-NULL when region is actually mapped */
- GLuint map_refcount; /**< Reference count for mapping */
uint32_t tiling; /**< Which tiling mode the region is in */
@@ -99,17 +97,6 @@ void intel_region_release(struct intel_region **ib);
void intel_recreate_static_regions(struct intel_context *intel);
-/**
- * Map/unmap regions. This is refcounted also:
- *
- * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
- */
-void *intel_region_map(struct intel_context *intel,
- struct intel_region *ib,
- GLbitfield mode);
-
-void intel_region_unmap(struct intel_context *intel, struct intel_region *ib);
-
/* Copy rectangular sub-regions
*/
bool
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index 6aaed60b962..654001d055d 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -178,7 +178,7 @@ intel_tex_map_image_for_swrast(struct intel_context *intel,
DBG("%s \n", __FUNCTION__);
- intel_image->base.Map = intel_region_map(intel, mt->region, mode);
+ intel_image->base.Map = intel_miptree_map_raw(intel, mt);
} else {
assert(intel_image->base.Base.Depth == 1);
intel_miptree_get_image_offset(mt, level, face, &x, &y);
@@ -186,7 +186,7 @@ intel_tex_map_image_for_swrast(struct intel_context *intel,
DBG("%s: (%d,%d) -> (%d, %d)/%d\n",
__FUNCTION__, face, level, x, y, mt->region->pitch);
- intel_image->base.Map = intel_region_map(intel, mt->region, mode) +
+ intel_image->base.Map = intel_miptree_map_raw(intel, mt) +
x * mt->cpp + y * mt->region->pitch;
}
@@ -199,7 +199,7 @@ intel_tex_unmap_image_for_swrast(struct intel_context *intel,
struct intel_texture_image *intel_image)
{
if (intel_image && intel_image->mt) {
- intel_region_unmap(intel, intel_image->mt->region);
+ intel_miptree_unmap_raw(intel, intel_image->mt);
intel_image->base.Map = NULL;
}
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-05 01:54:34 +0000