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-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp15
2 files changed, 16 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 689040b9336..847c75ebcf5 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -168,7 +168,7 @@ with_writemask(dst_reg const &r, int mask);
class vec4_instruction : public backend_instruction {
public:
- DECLARE_RZALLOC_CXX_OPERATORS(vec4_instruction)
+ DECLARE_RALLOC_CXX_OPERATORS(vec4_instruction)
vec4_instruction(vec4_visitor *v, enum opcode opcode,
dst_reg dst = dst_reg(),
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 3ff6a610359..6b9c4c62f66 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -38,7 +38,22 @@ vec4_instruction::vec4_instruction(vec4_visitor *v,
this->src[0] = src0;
this->src[1] = src1;
this->src[2] = src2;
+ this->saturate = false;
+ this->force_writemask_all = false;
+ this->no_dd_clear = false;
+ this->no_dd_check = false;
+ this->conditional_mod = BRW_CONDITIONAL_NONE;
+ this->sampler = 0;
+ this->texture_offset = 0;
+ this->target = 0;
+ this->shadow_compare = false;
this->ir = v->base_ir;
+ this->urb_write_flags = BRW_URB_WRITE_NO_FLAGS;
+ this->header_present = false;
+ this->mlen = 0;
+ this->base_mrf = 0;
+ this->offset = 0;
+ this->ir = NULL;
this->annotation = v->current_annotation;
}