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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c4
4 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index d1086440444..ce639d731e3 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -865,6 +865,8 @@ struct brw_context
*/
bool perf_debug;
+ uint32_t max_gtt_map_object_size;
+
bool emit_state_always;
bool has_surface_tile_offset;
bool has_compr4;
diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index 2839d6dd91a..1d6aac8d6cc 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -523,7 +523,7 @@ intelInitContext(struct brw_context *brw,
* taken up by things like the framebuffer and the ringbuffer and such, so
* be more conservative.
*/
- intel->max_gtt_map_object_size = gtt_size / 4;
+ brw->max_gtt_map_object_size = gtt_size / 4;
brw->bufmgr = intelScreen->bufmgr;
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index 2713eb852a6..ae0bc93d011 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -137,8 +137,6 @@ struct intel_context
char buffer[4096];
} upload;
- uint32_t max_gtt_map_object_size;
-
int driFd;
__DRIcontext *driContext;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6ad8044d8c0..cc3145c7580 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -571,7 +571,7 @@ intel_miptree_create(struct brw_context *brw,
* BLT engine to support it. The BLT paths can't currently handle Y-tiling,
* so we need to fall back to X.
*/
- if (y_or_x && mt->region->bo->size >= intel->max_gtt_map_object_size) {
+ if (y_or_x && mt->region->bo->size >= brw->max_gtt_map_object_size) {
perf_debug("%dx%d miptree larger than aperture; falling back to X-tiled\n",
mt->total_width, mt->total_height);
intel_region_release(&mt->region);
@@ -2146,7 +2146,7 @@ intel_miptree_map_singlesample(struct brw_context *brw,
mt->region->pitch < 32768) {
intel_miptree_map_blit(brw, mt, map, level, slice);
} else if (mt->region->tiling != I915_TILING_NONE &&
- mt->region->bo->size >= intel->max_gtt_map_object_size) {
+ mt->region->bo->size >= brw->max_gtt_map_object_size) {
assert(mt->region->pitch < 32768);
intel_miptree_map_blit(brw, mt, map, level, slice);
} else {