r600g,radeonsi: share flags has_cp_dma and has_streamout

Reviewed-by: Michel Dänzer <[email protected]>

10 files changed, 28 insertions, 26 deletions

diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index c4fcaa06aab..e5d6249bcfb 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -86,7 +86,7 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
 	struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
 
 	assert(size);
-	assert(rctx->screen->has_cp_dma);
+	assert(rctx->screen->b.has_cp_dma);
 
 	offset += r600_resource_va(&rctx->screen->b.b, dst);
 
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 065ac6f7a7a..6faa53865fe 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2880,7 +2880,7 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
 
-	if (rctx->screen->has_streamout) {
+	if (rctx->screen->b.has_streamout) {
 		r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
 	}
 
@@ -3337,7 +3337,7 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_value(cb, 0); /* R_028B94_VGT_STRMOUT_CONFIG */
 	r600_store_value(cb, 0); /* R_028B98_VGT_STRMOUT_BUFFER_CONFIG */
 
-	if (rctx->screen->has_streamout) {
+	if (rctx->screen->b.has_streamout) {
 		r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
 	}
 
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 8680f797a67..d3e9ec9c9d4 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -604,10 +604,10 @@ static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst
 {
 	struct r600_context *rctx = (struct r600_context*)ctx;
 
-	if (rctx->screen->has_cp_dma) {
+	if (rctx->screen->b.has_cp_dma) {
 		r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
 	}
-	else if (rctx->screen->has_streamout &&
+	else if (rctx->screen->b.has_streamout &&
 		 /* Require 4-byte alignment. */
 		 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
 
@@ -654,11 +654,11 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds
 {
 	struct r600_context *rctx = (struct r600_context*)ctx;
 
-	if (rctx->screen->has_cp_dma &&
+	if (rctx->screen->b.has_cp_dma &&
 	    rctx->b.chip_class >= EVERGREEN &&
 	    offset % 4 == 0 && size % 4 == 0) {
 		evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value);
-	} else if (rctx->screen->has_streamout && offset % 4 == 0 && size % 4 == 0) {
+	} else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
 		union pipe_color_union clear_value;
 		clear_value.ui[0] = value;
 
diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c
index 8d5c255bcfd..6c892c052e7 100644
--- a/src/gallium/drivers/r600/r600_buffer.c
+++ b/src/gallium/drivers/r600/r600_buffer.c
@@ -151,8 +151,8 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
 	else if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
 		 !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
 		 !(rctx->screen->b.debug_flags & DBG_NO_DISCARD_RANGE) &&
-		 (rctx->screen->has_cp_dma ||
-		  (rctx->screen->has_streamout &&
+		 (rctx->screen->b.has_cp_dma ||
+		  (rctx->screen->b.has_streamout &&
 		   /* The buffer range must be aligned to 4 with streamout. */
 		   box->x % 4 == 0 && box->width % 4 == 0))) {
 		assert(usage & PIPE_TRANSFER_WRITE);
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 191a81dab42..11414cb6aa0 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -445,7 +445,7 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
 	struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
 
 	assert(size);
-	assert(rctx->screen->has_cp_dma);
+	assert(rctx->screen->b.has_cp_dma);
 
 	dst_offset += r600_resource_va(&rctx->screen->b.b, dst);
 	src_offset += r600_resource_va(&rctx->screen->b.b, src);
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index f381e30b628..0075ae67c4e 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -469,9 +469,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
 	/* Stream output. */
 	case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-		return rscreen->has_streamout ? 4 : 0;
+		return rscreen->b.has_streamout ? 4 : 0;
 	case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-		return rscreen->has_streamout ? 1 : 0;
+		return rscreen->b.has_streamout ? 1 : 0;
 	case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 	case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 		return 32*4;
@@ -914,20 +914,20 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
 	switch (rscreen->b.chip_class) {
 	case R600:
 		if (rscreen->b.family < CHIP_RS780) {
-			rscreen->has_streamout = rscreen->b.info.drm_minor >= 14;
+			rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 14;
 		} else {
-			rscreen->has_streamout = rscreen->b.info.drm_minor >= 23;
+			rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 23;
 		}
 		break;
 	case R700:
-		rscreen->has_streamout = rscreen->b.info.drm_minor >= 17;
+		rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 17;
 		break;
 	case EVERGREEN:
 	case CAYMAN:
-		rscreen->has_streamout = rscreen->b.info.drm_minor >= 14;
+		rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 14;
 		break;
 	default:
-		rscreen->has_streamout = FALSE;
+		rscreen->b.has_streamout = FALSE;
 		break;
 	}
 
@@ -951,7 +951,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
 		rscreen->has_compressed_msaa_texturing = false;
 	}
 
-	rscreen->has_cp_dma = rscreen->b.info.drm_minor >= 27 &&
+	rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 &&
 			      !(rscreen->b.debug_flags & DBG_NO_CP_DMA);
 
 	rscreen->global_pool = compute_memory_pool_new(rscreen);
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index d58cd2e66c8..b3eb70cb424 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -205,9 +205,7 @@ struct r600_viewport_state {
 
 struct r600_screen {
 	struct r600_common_screen	b;
-	bool				has_streamout;
 	bool				has_msaa;
-	bool				has_cp_dma;
 	bool				has_compressed_msaa_texturing;
 
 	/*for compute global memory binding, we allocate stuff here, instead of
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index b938c33f7ce..6b8f294c6d3 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2730,10 +2730,10 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_context_reg(cb, R_0288A4_SQ_PGM_RESOURCES_FS, 0);
 	r600_store_context_reg(cb, R_0288DC_SQ_PGM_CF_OFFSET_FS, 0);
 
-	if (rctx->b.chip_class == R700 && rctx->screen->has_streamout)
+	if (rctx->b.chip_class == R700 && rctx->screen->b.has_streamout)
 		r600_store_context_reg(cb, R_028354_SX_SURFACE_SYNC, S_028354_SURFACE_SYNC_MASK(0xf));
 	r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
-	if (rctx->screen->has_streamout) {
+	if (rctx->screen->b.has_streamout) {
 		r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
 	}
 
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index eb54b2a1c46..4a5476e5406 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -161,6 +161,8 @@ struct r600_common_screen {
 	struct radeon_info		info;
 	struct r600_tiling_info		tiling_info;
 	unsigned			debug_flags;
+	bool				has_cp_dma;
+	bool				has_streamout;
 
 	/* Auxiliary context. Mainly used to initialize resources.
 	 * It must be locked prior to using and flushed before unlocking. */
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 4aaa88f2d60..866cc1af8d8 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -290,7 +290,6 @@ static const char* r600_get_name(struct pipe_screen* pscreen)
 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 {
 	struct r600_screen *rscreen = (struct r600_screen *)pscreen;
-	bool has_streamout = HAVE_LLVM >= 0x0304;
 
 	switch (param) {
 	/* Supported features (boolean caps). */
@@ -373,12 +372,12 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
 	/* Stream output. */
 	case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-		return has_streamout ? 4 : 0;
+		return rscreen->b.has_streamout ? 4 : 0;
 	case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-		return has_streamout ? 1 : 0;
+		return rscreen->b.has_streamout ? 1 : 0;
 	case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 	case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
-		return has_streamout ? 32*4 : 0;
+		return rscreen->b.has_streamout ? 32*4 : 0;
 
 	/* Texturing. */
 	case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
@@ -666,6 +665,9 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 		return NULL;
 	}
 
+	rscreen->b.has_cp_dma = true;
+	rscreen->b.has_streamout = HAVE_LLVM >= 0x0304;
+
 	if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
 		rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;