diff options
author | Jason Ekstrand <[email protected]> | 2016-02-10 21:20:01 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2016-02-11 15:07:20 -0800 |
commit | ae3543950c93ec4ac179013cb1c7baaf6f5ef4a7 (patch) | |
tree | 19563a5755dc0b102f8b531db7092ff7173be38b /src | |
parent | d759f0ddf10543def4bde985fb1fc38f0df5a681 (diff) |
i965/fs: Refactor setup_payload_gen6 to assume FS
It's extremely FS specific so the fact that we have a stage check in the
middle of it is rather bogus. While were here, we rename
setup_payload_gen4 and setup_payload_gen6 to make it obvious that they are
both FS specific.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 24 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_iz.cpp | 2 |
3 files changed, 15 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 7620858e36e..a5d403474f9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -4848,8 +4848,12 @@ fs_visitor::get_instruction_generating_reg(fs_inst *start, } void -fs_visitor::setup_payload_gen6() +fs_visitor::setup_fs_payload_gen6() { + assert(stage == MESA_SHADER_FRAGMENT); + brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; + bool uses_depth = (nir->info.inputs_read & (1 << VARYING_SLOT_POS)) != 0; unsigned barycentric_interp_modes = @@ -4898,15 +4902,11 @@ fs_visitor::setup_payload_gen6() } } - if (stage == MESA_SHADER_FRAGMENT) { - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; - brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; - prog_data->uses_pos_offset = key->compute_pos_offset; - /* R31: MSAA position offsets. */ - if (prog_data->uses_pos_offset) { - payload.sample_pos_reg = payload.num_regs; - payload.num_regs++; - } + prog_data->uses_pos_offset = key->compute_pos_offset; + /* R31: MSAA position offsets. */ + if (prog_data->uses_pos_offset) { + payload.sample_pos_reg = payload.num_regs; + payload.num_regs++; } /* R32: MSAA input coverage mask */ @@ -5347,9 +5347,9 @@ fs_visitor::run_fs(bool do_rep_send) assert(stage == MESA_SHADER_FRAGMENT); if (devinfo->gen >= 6) - setup_payload_gen6(); + setup_fs_payload_gen6(); else - setup_payload_gen4(); + setup_fs_payload_gen4(); if (0) { emit_dummy_fs(); diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 4a26ac1680e..7c3d85c2688 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -115,8 +115,8 @@ public: bool run_cs(); void optimize(); void allocate_registers(); - void setup_payload_gen4(); - void setup_payload_gen6(); + void setup_fs_payload_gen4(); + void setup_fs_payload_gen6(); void setup_vs_payload(); void setup_gs_payload(); void setup_cs_payload(); diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp index 83e1855025d..9d9f4e49d07 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp @@ -120,7 +120,7 @@ static const struct { * \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES * \param lookup bitmask of IZ_* flags */ -void fs_visitor::setup_payload_gen4() +void fs_visitor::setup_fs_payload_gen4() { assert(stage == MESA_SHADER_FRAGMENT); brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; |