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authorNanley Chery <[email protected]>2019-09-13 14:18:42 -0700
committerNanley Chery <[email protected]>2019-10-28 10:47:05 -0700
commit8af1853331254c50476e424d41efa76d2e86c0e9 (patch)
tree1280552261f36844e6627fa2a4de37236e16ec6f /src
parentba52cd7ab2a6908eb198307186e9c5ece004450a (diff)
anv/private: Modify aux slice helpers for Gen12 CCS
The isl_surf structs for Gen12's CCS won't describe how many slices in the main surface can be compressed. All slices will be compressable if CCS is enabled, so lookup the main surface's logical dimension. v2. Add a space before a `?`. (Jordan) Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/vulkan/anv_private.h20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index c6f5ff7cfeb..fc809f6ac73 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -3233,8 +3233,15 @@ anv_image_aux_levels(const struct anv_image * const image,
VkImageAspectFlagBits aspect)
{
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+
+ /* The Gen12 CCS aux surface is represented with only one level. */
+ const uint8_t aux_logical_levels =
+ image->planes[plane].aux_surface.isl.tiling == ISL_TILING_GEN12_CCS ?
+ image->planes[plane].surface.isl.levels :
+ image->planes[plane].aux_surface.isl.levels;
+
return image->planes[plane].aux_surface.isl.size_B > 0 ?
- image->planes[plane].aux_surface.isl.levels : 0;
+ aux_logical_levels : 0;
}
/* Returns the number of auxiliary buffer layers attached to an image. */
@@ -3255,8 +3262,15 @@ anv_image_aux_layers(const struct anv_image * const image,
return 0;
} else {
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
- return MAX2(image->planes[plane].aux_surface.isl.logical_level0_px.array_len,
- image->planes[plane].aux_surface.isl.logical_level0_px.depth >> miplevel);
+
+ /* The Gen12 CCS aux surface is represented with only one layer. */
+ const struct isl_extent4d *aux_logical_level0_px =
+ image->planes[plane].aux_surface.isl.tiling == ISL_TILING_GEN12_CCS ?
+ &image->planes[plane].surface.isl.logical_level0_px :
+ &image->planes[plane].aux_surface.isl.logical_level0_px;
+
+ return MAX2(aux_logical_level0_px->array_len,
+ aux_logical_level0_px->depth >> miplevel);
}
}