diff options
author | Ilia Mirkin <[email protected]> | 2014-09-09 22:52:55 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2014-09-12 16:26:01 -0400 |
commit | 11d72553c5aaf5e7d3b2ab7d73f5cb8610aeb685 (patch) | |
tree | 8867d4af17a6854be9d55f514614de04540e95d1 /src | |
parent | 8edf83b37738393bede502aae937a868ed98fefd (diff) |
freedreno/ir3: negate result of USLT/etc
Signed-off-by: Ilia Mirkin <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_compiler.c | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c index c461c24ba52..e214fec7ee0 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c @@ -1445,22 +1445,22 @@ trans_cmp(const struct instr_translater *t, } /* - * USNE(a,b) = (a != b) ? 1 : 0 + * USNE(a,b) = (a != b) ? ~0 : 0 * cmps.u32.ne dst, a, b * - * USEQ(a,b) = (a == b) ? 1 : 0 + * USEQ(a,b) = (a == b) ? ~0 : 0 * cmps.u32.eq dst, a, b * - * ISGE(a,b) = (a > b) ? 1 : 0 + * ISGE(a,b) = (a > b) ? ~0 : 0 * cmps.s32.ge dst, a, b * - * USGE(a,b) = (a > b) ? 1 : 0 + * USGE(a,b) = (a > b) ? ~0 : 0 * cmps.u32.ge dst, a, b * - * ISLT(a,b) = (a < b) ? 1 : 0 + * ISLT(a,b) = (a < b) ? ~0 : 0 * cmps.s32.lt dst, a, b * - * USLT(a,b) = (a < b) ? 1 : 0 + * USLT(a,b) = (a < b) ? ~0 : 0 * cmps.u32.lt dst, a, b * * UCMP(a,b,c) = (a < 0) ? b : c @@ -1526,10 +1526,17 @@ trans_icmp(const struct instr_translater *t, instr = instr_create(ctx, 3, OPC_SEL_B32); vectorize(ctx, instr, dst, 3, a1, 0, tmp_src, 0, a2, 0); } else { - /* cmps.{u32,s32}.<cond> dst, a0, a1 */ + struct tgsi_dst_register tmp_dst; + struct tgsi_src_register *tmp_src; + tmp_src = get_internal_temp(ctx, &tmp_dst); + /* cmps.{u32,s32}.<cond> tmp, a0, a1 */ instr = instr_create(ctx, 2, t->opc); instr->cat2.condition = condition; - vectorize(ctx, instr, dst, 2, a0, 0, a1, 0); + vectorize(ctx, instr, &tmp_dst, 2, a0, 0, a1, 0); + + /* absneg.s dst, (neg)tmp */ + instr = instr_create(ctx, 2, OPC_ABSNEG_S); + vectorize(ctx, instr, dst, 1, tmp_src, IR3_REG_NEGATE); } put_dst(ctx, inst, dst); } |