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authorSamuel Pitoiset <[email protected]>2020-06-09 17:59:00 +0200
committerMarge Bot <[email protected]>2020-06-12 08:22:47 +0000
commit07aefe8065ddcc6c4c5815c761ede265bd760d78 (patch)
treedd2a12a24305cd1fcc8ef9fe727a1fb24ffc7d29 /src
parent900bf50c39089ef9841eccd729527319eaf49888 (diff)
radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly
Use the SPIR-V execution modes if set. Cc: 20.1 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5404>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_pipeline.c7
-rw-r--r--src/amd/vulkan/radv_shader.h1
-rw-r--r--src/amd/vulkan/radv_shader_info.c1
3 files changed, 9 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 6d8e7f9555f..771442b4713 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4492,12 +4492,18 @@ radv_compute_db_shader_control(const struct radv_device *device,
const struct radv_pipeline *pipeline,
const struct radv_shader_variant *ps)
{
+ unsigned conservative_z_export = V_02880C_EXPORT_ANY_Z;
unsigned z_order;
if (ps->info.ps.early_fragment_test || !ps->info.ps.writes_memory)
z_order = V_02880C_EARLY_Z_THEN_LATE_Z;
else
z_order = V_02880C_LATE_Z;
+ if (ps->info.ps.depth_layout == FRAG_DEPTH_LAYOUT_GREATER)
+ conservative_z_export = V_02880C_EXPORT_GREATER_THAN_Z;
+ else if (ps->info.ps.depth_layout == FRAG_DEPTH_LAYOUT_LESS)
+ conservative_z_export = V_02880C_EXPORT_LESS_THAN_Z;
+
bool disable_rbplus = device->physical_device->rad_info.has_rbplus &&
!device->physical_device->rad_info.rbplus_allowed;
@@ -4511,6 +4517,7 @@ radv_compute_db_shader_control(const struct radv_device *device,
S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(ps->info.ps.writes_stencil) |
S_02880C_KILL_ENABLE(!!ps->info.ps.can_discard) |
S_02880C_MASK_EXPORT_ENABLE(mask_export_enable) |
+ S_02880C_CONSERVATIVE_Z_EXPORT(conservative_z_export) |
S_02880C_Z_ORDER(z_order) |
S_02880C_DEPTH_BEFORE_SHADER(ps->info.ps.early_fragment_test) |
S_02880C_PRE_SHADER_DEPTH_COVERAGE_ENABLE(ps->info.ps.post_depth_coverage) |
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 9e0a67b1378..18d7b0cf9bd 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -312,6 +312,7 @@ struct radv_shader_info {
bool can_discard;
bool early_fragment_test;
bool post_depth_coverage;
+ uint8_t depth_layout;
} ps;
struct {
bool uses_grid_size;
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index c651f216280..c7e26ba176f 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -763,6 +763,7 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
info->ps.can_discard = nir->info.fs.uses_discard;
info->ps.early_fragment_test = nir->info.fs.early_fragment_tests;
info->ps.post_depth_coverage = nir->info.fs.post_depth_coverage;
+ info->ps.depth_layout = nir->info.fs.depth_layout;
break;
case MESA_SHADER_GEOMETRY:
info->gs.vertices_in = nir->info.gs.vertices_in;