diff options
author | Kenneth Graunke <[email protected]> | 2016-05-12 18:53:23 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2016-05-15 23:50:52 -0700 |
commit | c907ca6c8d256f4b8c271bcf0901661ef943ae08 (patch) | |
tree | 607678dcc4b8510a9702d4196ad9bf6c2d26ccbe /src | |
parent | 6d65b0c6dc0ef4fad319129fea5fd7b4ad940bec (diff) |
i965: Flip interpolateAtOffset's y offset when necessary.
Fixes 4 dEQP-GLES31.functional.shaders.multisample_interpolation tests:
- interpolate_at_offset.no_qualifiers.default_framebuffer
- interpolate_at_offset.centroid_qualifier.default_framebuffer
- interpolate_at_offset.sample_qualifier.default_framebuffer
- interpolate_at_offset.array_element.default_framebuffer
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 3 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 2c22b4f74e7..7458b73b1d4 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -2871,9 +2871,12 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, case nir_intrinsic_interp_var_at_offset: { nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); + const bool flip = !wm_key->render_to_fbo; + if (const_offset) { unsigned off_x = MIN2((int)(const_offset->f32[0] * 16), 7) & 0xf; - unsigned off_y = MIN2((int)(const_offset->f32[1] * 16), 7) & 0xf; + unsigned off_y = MIN2((int)(const_offset->f32[1] * 16 * + (flip ? -1 : 1)), 7) & 0xf; emit_pixel_interpolater_send(bld, FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET, @@ -2889,7 +2892,8 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, fs_reg temp = vgrf(glsl_type::float_type); bld.MUL(temp, offset(offset_src, bld, i), brw_imm_f(16.0f)); fs_reg itemp = vgrf(glsl_type::int_type); - bld.MOV(itemp, temp); /* float to int */ + /* float to int */ + bld.MOV(itemp, (i == 1 && flip) ? negate(temp) : temp); /* Clamp the upper end of the range to +7/16. * ARB_gpu_shader5 requires that we support a maximum offset diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 395b0b8b1e8..d47a2665db7 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -511,7 +511,8 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key) key->drawable_height = _mesa_geometric_height(ctx->DrawBuffer); } - if ((fp->program.Base.InputsRead & VARYING_BIT_POS) || program_uses_dfdy) { + if ((fp->program.Base.InputsRead & VARYING_BIT_POS) || + program_uses_dfdy || prog->nir->info.uses_interp_var_at_offset) { key->render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); } |