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authorAnuj Phogat <[email protected]>2018-02-14 14:30:27 -0800
committerAnuj Phogat <[email protected]>2018-02-15 16:14:56 -0800
commitba3cbee6c56a31ca1513f9c2b205f2c0174d9e60 (patch)
tree8ff00cd07e7026d9dcb43f7aacb9f49fc61c6e7c /src
parent9c144dc81e11658c868867052d14d60cca55a641 (diff)
intel/common/icl: Add has_sample_with_hiz flag in gen_device_info
Sampling from hiz is enabled in i965 for GEN9+ but this feature has been removed from gen11. So, this new flag will be useful to turn the feature on/off for different gen h/w. It will be used later in a patch adding device info for gen11. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/common/gen_device_info.c7
-rw-r--r--src/intel/common/gen_device_info.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c5
3 files changed, 9 insertions, 5 deletions
diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
index c0eb7c3c356..a08a13a32a4 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -311,12 +311,16 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
},
};
+/* It's unclear how well supported sampling from the hiz buffer is on GEN8,
+ * so keep things conservative for now and set has_sample_with_hiz = false.
+ */
#define GEN8_FEATURES \
.gen = 8, \
.has_hiz_and_separate_stencil = true, \
.has_resource_streamer = true, \
.must_use_separate_stencil = true, \
.has_llc = true, \
+ .has_sample_with_hiz = false, \
.has_pln = true, \
.supports_simd16_3src = true, \
.has_surface_tile_offset = true, \
@@ -451,6 +455,7 @@ static const struct gen_device_info gen_device_info_chv = {
GEN9_HW_INFO, \
.gt = 1, \
.has_llc = false, \
+ .has_sample_with_hiz = true, \
.num_slices = 1, \
.num_thread_per_eu = 6, \
.max_vs_threads = 112, \
@@ -502,6 +507,7 @@ static const struct gen_device_info gen_device_info_chv = {
#define GEN9_FEATURES \
GEN8_FEATURES, \
GEN9_HW_INFO, \
+ .has_sample_with_hiz = true, \
.num_thread_per_eu = 7
static const struct gen_device_info gen_device_info_skl_gt1 = {
@@ -695,6 +701,7 @@ static const struct gen_device_info gen_device_info_cfl_gt3 = {
#define GEN10_FEATURES(_gt, _slices, _subslices, _l3) \
GEN8_FEATURES, \
GEN10_HW_INFO, \
+ .has_sample_with_hiz = true, \
.gt = _gt, \
.num_slices = _slices, \
.num_subslices = _subslices, \
diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
index 30ddd905be1..fd9c17531db 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -55,7 +55,7 @@ struct gen_device_info
bool has_hiz_and_separate_stencil;
bool must_use_separate_stencil;
-
+ bool has_sample_with_hiz;
bool has_llc;
bool has_pln;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index da5e3b0989d..6d35c9d3928 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1911,10 +1911,7 @@ intel_miptree_sample_with_hiz(struct brw_context *brw,
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
- /* It's unclear how well supported sampling from the hiz buffer is on GEN8,
- * so keep things conservative for now and never enable it unless we're SKL+.
- */
- if (devinfo->gen < 9) {
+ if (!devinfo->has_sample_with_hiz) {
return false;
}