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authorDave Airlie <[email protected]>2018-12-13 03:29:04 +0000
committerDave Airlie <[email protected]>2018-12-13 19:27:05 +0000
commitb3f2b03ece06327276b183d34fc6f94a2424f094 (patch)
treed46dec809ab14b04680d238172aa3632f3221558 /src
parent9ebc00f32ee434d4ca70f0fc562fc4df62e3859d (diff)
radv/xfb: fix counter buffer bounds checks.
If we gave this function 0 counter buffers, we'd still try and access pCounterBuffers[0] as this check was incorrect. Fixes crash with ext_transform_feedback-pipeline-basic-primgen on zink on radv. Fixes: 677b496b6 (radv: fix begin/end transform feedback with 0 counter buffers.) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 982107138d3..aebf93b447f 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -4853,7 +4853,7 @@ void radv_CmdBeginTransformFeedbackEXT(
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
- if (counter_buffer_idx >= 0 && counter_buffer_idx > counterBufferCount)
+ if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)
counter_buffer_idx = -1;
/* SI binds streamout buffers as shader resources.
@@ -4915,7 +4915,7 @@ void radv_CmdEndTransformFeedbackEXT(
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
- if (counter_buffer_idx >= 0 && counter_buffer_idx > counterBufferCount)
+ if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)
counter_buffer_idx = -1;
if (counter_buffer_idx >= 0 && pCounterBuffers && pCounterBuffers[counter_buffer_idx]) {