diff options
author | Alex Deucher <[email protected]> | 2012-11-15 23:05:59 -0500 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2013-06-28 15:16:46 -0400 |
commit | 9d8ad222c69d70201d6b62eda454e08333e836ad (patch) | |
tree | 1e99a1777ebc8dd7a1c62f95797c13a2dfc2cfc0 /src | |
parent | 72c10be3a76e0e63a6e33da148fd755a1e3f34c1 (diff) |
radeonsi: PA_CL_ENHANCE is privileged on CIK
Needs to be and is set by the kernel.
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index db113aacf91..4ef73ec4b37 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2925,8 +2925,9 @@ void si_init_config(struct r600_context *rctx) S_028AA8_PRIMGROUP_SIZE(63)); si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0x00000000); si_pm4_set_reg(pm4, R_028AB8_VGT_VTX_CNT_EN, 0x0); - si_pm4_set_reg(pm4, R_008A14_PA_CL_ENHANCE, S_008A14_NUM_CLIP_SEQ(3) | - S_008A14_CLIP_VTX_REORDER_ENA(1)); + if (rctx->chip_class < CIK) + si_pm4_set_reg(pm4, R_008A14_PA_CL_ENHANCE, S_008A14_NUM_CLIP_SEQ(3) | + S_008A14_CLIP_VTX_REORDER_ENA(1)); si_pm4_set_reg(pm4, R_028B54_VGT_SHADER_STAGES_EN, 0); si_pm4_set_reg(pm4, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0x76543210); |