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authorTom Stellard <thomas.stellard@amd.com>2012-05-29 11:59:01 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-05-29 11:59:01 -0400
commit83169900fb96f1a51d8292e66c203c64a82e204d (patch)
treeb447a28677dcf0deb4c9450225d10ef7428357fc /src
parent89ece086bcd2186ab53cb6a69d53005893cab0ea (diff)
radeon/llvm: Update and fix some comments
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/R600ISelLowering.cpp8
-rw-r--r--src/gallium/drivers/radeon/SIISelLowering.cpp10
2 files changed, 6 insertions, 12 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
index 5926a08fa76..2347ac73b8f 100644
--- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
+++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-// Most of the DAG lowering is handled in AMDILISelLowering.cpp. This file
+// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp. This file
// is mostly EmitInstrWithCustomInserter().
//
//===----------------------------------------------------------------------===//
@@ -39,12 +39,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FSUB, MVT::f32, Expand);
-#if 0
-
- setTargetDAGCombine(ISD::Constant);
- setTargetDAGCombine(ISD::ConstantFP);
-
-#endif
}
MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
diff --git a/src/gallium/drivers/radeon/SIISelLowering.cpp b/src/gallium/drivers/radeon/SIISelLowering.cpp
index 1cdcd36c648..c8a0e0b036e 100644
--- a/src/gallium/drivers/radeon/SIISelLowering.cpp
+++ b/src/gallium/drivers/radeon/SIISelLowering.cpp
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-// Most of the DAG lowering is handled in AMDILISelLowering.cpp. This file is
+// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp. This file is
// mostly EmitInstrWithCustomInserter().
//
//===----------------------------------------------------------------------===//
@@ -61,8 +61,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
.addOperand(MI->getOperand(0))
.addOperand(MI->getOperand(1))
- /* VSRC1-2 are unused, but we still need to fill all the
- * operand slots, so we just reuse the VSRC0 operand */
+ // VSRC1-2 are unused, but we still need to fill all the
+ // operand slots, so we just reuse the VSRC0 operand
.addOperand(MI->getOperand(1))
.addOperand(MI->getOperand(1))
.addImm(0) // ABS
@@ -76,8 +76,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
.addOperand(MI->getOperand(0))
.addOperand(MI->getOperand(1))
- /* VSRC1-2 are unused, but we still need to fill all the
- * operand slots, so we just reuse the VSRC0 operand */
+ // VSRC1-2 are unused, but we still need to fill all the
+ // operand slots, so we just reuse the VSRC0 operand
.addOperand(MI->getOperand(1))
.addOperand(MI->getOperand(1))
.addImm(1) // ABS