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authorTopi Pohjolainen <[email protected]>2017-06-28 12:11:16 +0300
committerTopi Pohjolainen <[email protected]>2017-07-22 00:14:16 +0300
commit61c95c94a0c74f0ca3b7f36b32c541a4137d7024 (patch)
treecc6bd0491d4ce6e564e5b71fcbdc4659a2aa9c51 /src
parentbbd89c195105d892cf0bd09710554bf124e5e881 (diff)
i965/miptree: Relax size alignment for linear surfaces
Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 984529d883b..73637b0fc52 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -822,7 +822,12 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format,
}
}
- assert(mt->surf.size % mt->surf.row_pitch == 0);
+ /* In case of linear the buffer gets padded by fixed 64 bytes and therefore
+ * the size may not be multiple of row_pitch.
+ * See isl_apply_surface_padding().
+ */
+ if (mt->surf.tiling != ISL_TILING_LINEAR)
+ assert(mt->surf.size % mt->surf.row_pitch == 0);
if (!bo) {
mt->bo = brw_bo_alloc_tiled(brw->bufmgr, "isl-miptree",