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authorEric Anholt <[email protected]>2010-09-28 09:47:37 -0700
committerEric Anholt <[email protected]>2010-09-28 10:10:44 -0700
commit5f7bd68149e59b6940e891928faa532bce0271f6 (patch)
treeac55bb64d1cbf6036ed2b3b3e9accd0988e519b0 /src
parentef8e002c75a5def2c400638336dcd55d411d87be (diff)
i965: Add support for gl_FrontFacing to the new FS backend.
Fixes: glsl1-gl_FrontFacing var (1) glsl1-gl_FrontFacing var (2)
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp18
1 files changed, 15 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 4a63fc61aaa..0595488c9cc 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -615,7 +615,21 @@ fs_visitor::visit(ir_variable *ir)
}
if (ir->mode == ir_var_in) {
- reg = &this->interp_attrs[ir->location];
+ if (strcmp(ir->name, "gl_FrontFacing") == 0) {
+ reg = new(this->mem_ctx) fs_reg(this, ir->type);
+ struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
+ /* bit 31 is "primitive is back face", so checking < (1 << 31) gives
+ * us front face
+ */
+ fs_inst *inst = emit(fs_inst(BRW_OPCODE_CMP,
+ *reg,
+ fs_reg(r1_6ud),
+ fs_reg(1u << 31)));
+ inst->conditional_mod = BRW_CONDITIONAL_L;
+ emit(fs_inst(BRW_OPCODE_AND, *reg, *reg, fs_reg(1u)));
+ } else {
+ reg = &this->interp_attrs[ir->location];
+ }
}
if (ir->mode == ir_var_uniform) {
@@ -1342,8 +1356,6 @@ fs_visitor::emit_interpolation()
this->pixel_w = fs_reg(this, glsl_type::float_type);
emit(fs_inst(FS_OPCODE_RCP, this->pixel_w, wpos));
- /* FINISHME: gl_FrontFacing */
-
foreach_iter(exec_list_iterator, iter, *this->shader->ir) {
ir_instruction *ir = (ir_instruction *)iter.get();
ir_variable *var = ir->as_variable();