diff options
| author | Rob Clark <[email protected]> | 2014-05-14 11:15:26 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2014-05-14 21:25:53 -0400 |
| commit | 5dcf59e1429310b736a11f1ae17ae8d5842a63c2 (patch) | |
| tree | db724b3e69e24ce008f95eba9b7a74a9f791ac8f /src | |
| parent | e1896948da317406fd0fc27096952badf1d3cffc (diff) | |
freedreno/a3xx: fix MAX_INPUTS shader cap
Hardware only supports 16. Which fd3_shader_variant properly reflected,
but the pipe cap did not, leading to array overflow (and shaders that
could not possibly work).
Also a bunch of asserts to make problems like this easier to see.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_compiler.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_screen.c | 2 |
3 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c index 440c12f3e64..bb20416fc32 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c @@ -2138,6 +2138,8 @@ decl_in(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) DBG("decl in -> r%d", i); + compile_assert(ctx, n < ARRAY_SIZE(so->inputs)); + so->inputs[n].semantic = decl_semantic(&decl->Semantic); so->inputs[n].compmask = (1 << ncomp) - 1; so->inputs[n].regid = r; @@ -2227,6 +2229,8 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) ncomp = 4; + compile_assert(ctx, n < ARRAY_SIZE(so->outputs)); + so->outputs[n].semantic = decl_semantic(&decl->Semantic); so->outputs[n].regid = regid(i, comp); @@ -2350,6 +2354,7 @@ compile_instructions(struct fd3_compile_context *ctx) struct tgsi_full_immediate *imm = &ctx->parser.FullToken.FullImmediate; unsigned n = ctx->so->immediates_count++; + compile_assert(ctx, n < ARRAY_SIZE(ctx->so->immediates)); memcpy(ctx->so->immediates[n].val, imm->u, 16); break; } diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c index ddb69243c11..0f7044b56f1 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c @@ -1324,6 +1324,8 @@ decl_in(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) DBG("decl in -> r%d", i + base); // XXX + compile_assert(ctx, n < ARRAY_SIZE(so->inputs)); + so->inputs[n].semantic = decl_semantic(&decl->Semantic); so->inputs[n].compmask = (1 << ncomp) - 1; so->inputs[n].ncomp = ncomp; @@ -1410,6 +1412,7 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) for (i = decl->Range.First; i <= decl->Range.Last; i++) { unsigned n = so->outputs_count++; + compile_assert(ctx, n < ARRAY_SIZE(so->outputs)); so->outputs[n].semantic = decl_semantic(&decl->Semantic); so->outputs[n].regid = regid(i + base, comp); } diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 2a346e9e619..ecbdb09994e 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -321,7 +321,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: return 8; /* XXX */ case PIPE_SHADER_CAP_MAX_INPUTS: - return 32; + return 16; case PIPE_SHADER_CAP_MAX_TEMPS: return 64; /* Max native temporaries. */ case PIPE_SHADER_CAP_MAX_ADDRS: |