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authorNicolai Hähnle <[email protected]>2016-02-09 13:02:34 -0500
committerNicolai Hähnle <[email protected]>2016-03-09 11:39:55 -0500
commit4eb416bd9d670f55fe9691bcd75950f728a0b782 (patch)
tree58397c6e0fd9b93c97c7c0e86320061298740e95 /src
parent10b2b584ee6018ad3ae8ee5c494a02705a906957 (diff)
gallivm: special case TGSI_OPCODE_STORE
This instruction has the resource (buffer or image) as a destination to represent the writemask for SSBO writes. However, this is obviously not a "real" destination for the purpose of emitting LLVM IR. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index 1cbe47ca91f..614c6558ede 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -315,7 +315,7 @@ lp_build_tgsi_inst_llvm(
}
}
- if (info->num_dst > 0) {
+ if (info->num_dst > 0 && info->opcode != TGSI_OPCODE_STORE) {
bld_base->emit_store(bld_base, inst, info, emit_data.output);
}
return TRUE;