diff options
author | Christian König <[email protected]> | 2011-04-24 12:57:35 +0200 |
---|---|---|
committer | Christian König <[email protected]> | 2011-04-24 13:03:16 +0200 |
commit | 4e6528428d4efa6fb2e5101bce2544d8304da3de (patch) | |
tree | 8a289046022ef3f401561db464de38c7205f587c /src | |
parent | 68cc6bc5d8b6986acc7f5780d705f4ae9be2a446 (diff) |
r600g: implement clamp_fragment_color handling
The first small step to get arb_color_buffer_float working.
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index da4f2706eef..8646b9f4905 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -285,7 +285,7 @@ static void *r600_create_rs_state(struct pipe_context *ctx, { struct r600_pipe_rasterizer *rs = CALLOC_STRUCT(r600_pipe_rasterizer); struct r600_pipe_state *rstate; - unsigned tmp; + unsigned tmp, cb; unsigned prov_vtx = 1, polygon_dual_mode; unsigned clip_rule; @@ -358,6 +358,11 @@ static void *r600_create_rs_state(struct pipe_context *ctx, r600_pipe_state_add_reg(rstate, R_028DFC_PA_SU_POLY_OFFSET_CLAMP, 0x00000000, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, clip_rule, 0xFFFFFFFF, NULL); + for (cb = 0; cb < 7; ++cb) + r600_pipe_state_add_reg(rstate, R_0280A0_CB_COLOR0_INFO + cb * 4, + S_0280A0_BLEND_CLAMP(state->clamp_fragment_color), + S_0280A0_BLEND_CLAMP(1), NULL); + return rstate; } @@ -719,7 +724,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta struct r600_surface *surf; unsigned level = state->cbufs[cb]->u.tex.level; unsigned pitch, slice; - unsigned color_info; + unsigned color_info, color_info_mask; unsigned format, swap, ntype, endian; unsigned offset; const struct util_format_description *desc; @@ -772,22 +777,28 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta color_info = S_0280A0_FORMAT(format) | S_0280A0_COMP_SWAP(swap) | S_0280A0_ARRAY_MODE(rtex->array_mode[level]) | - S_0280A0_BLEND_CLAMP(1) | S_0280A0_NUMBER_TYPE(ntype) | S_0280A0_ENDIAN(endian); + color_info_mask = 0xFFFFFFFF & ~S_0280A0_BLEND_CLAMP(1); + /* on R600 this can't be set if BLEND_CLAMP isn't set, if BLEND_FLOAT32 is set of > 11 bits in a UNORM or SNORM */ - if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS && - desc->channel[i].size < 12) + if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS && desc->channel[i].size < 12) { + //TODO: Seems to work on RV710, but i have no idea what to do between R600-RV710 + if (rctx->family < CHIP_RV710) { + color_info |= S_0280A0_BLEND_CLAMP(1); + color_info_mask |= S_0280A0_BLEND_CLAMP(1); + } color_info |= S_0280A0_SOURCE_FORMAT(V_0280A0_EXPORT_NORM); + } r600_pipe_state_add_reg(rstate, R_028040_CB_COLOR0_BASE + cb * 4, (offset + r600_bo_offset(bo[0])) >> 8, 0xFFFFFFFF, bo[0]); r600_pipe_state_add_reg(rstate, R_0280A0_CB_COLOR0_INFO + cb * 4, - color_info, 0xFFFFFFFF, NULL); + color_info, color_info_mask, NULL); r600_pipe_state_add_reg(rstate, R_028060_CB_COLOR0_SIZE + cb * 4, S_028060_PITCH_TILE_MAX(pitch) | |