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authorJerome Glisse <[email protected]>2009-05-27 21:50:03 +0200
committerJerome Glisse <[email protected]>2009-05-27 21:50:03 +0200
commit3a6dd3ebb33a35779b0d5be2c8cab581a56f245a (patch)
tree4f8b818a9507b6f2f027e307a6565970a096ff19 /src
parent6141c9ba71df68c44fb4f8c9409f23b557009ca0 (diff)
radeon: emit scissor before emiting vertices
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index 8f8878ee104..01c45df2dfa 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -206,8 +206,6 @@ void radeonFlushElts( GLcontext *ctx )
assert( rmesa->radeon.dma.flush == radeonFlushElts );
rmesa->radeon.dma.flush = NULL;
- radeonEmitScissor(rmesa);
-
nr = rmesa->tcl.elt_used;
#if RADEON_OLD_PACKETS
@@ -260,6 +258,7 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
assert((primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND));
radeonEmitState(&rmesa->radeon);
+ radeonEmitScissor(rmesa);
rmesa->tcl.elt_cmd_start = rmesa->radeon.cmdbuf.cs->cdw;
@@ -280,7 +279,6 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
RADEON_CP_VC_CNTL_PRIM_WALK_IND |
RADEON_CP_VC_CNTL_COLOR_ORDER_RGBA |
RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE);
-
#else
BEGIN_BATCH_NO_AUTOSTATE(ELTS_BUFSZ(align_min_nr)/4);
OUT_BATCH_PACKET3_CLIP(RADEON_CP_PACKET3_DRAW_INDX, 0);