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authorTimothy Arceri <[email protected]>2017-07-24 12:37:07 +1000
committerTimothy Arceri <[email protected]>2017-08-22 11:29:27 +1000
commit36431cf9796517b4e08b930aecc5ec66e5ec432e (patch)
tree8cea6853f5527a41965449cdb5a81c6f3e6ae602 /src
parent4c2422067b5c114977d228b38ee95077cd55b7e9 (diff)
i965: enable STD430 packing by default on IVB+
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index d157f059704..3380582b3fa 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -675,6 +675,22 @@ brw_initialize_context_constants(struct brw_context *brw)
/* OES_primitive_bounding_box */
ctx->Const.NoPrimitiveBoundingBoxOutput = true;
+
+ /* TODO: We should be able to use STD430 packing by default on all hardware
+ * but some piglit tests [1] currently fail on SNB when this is enabled.
+ * The problem is the messages we're using for doing uniform pulls
+ * in the vec4 back-end on SNB is the OWORD block load instruction, which
+ * takes its offset in units of OWORDS (16 bytes). On IVB+, we use the
+ * sampler which doesn't have these restrictions.
+ *
+ * In the scalar back-end, we use the sampler for dynamic uniform loads and
+ * pull an entire cache line at a time for constant offset loads both of
+ * which support almost any alignment.
+ *
+ * [1] glsl-1.40/uniform_buffer/vs-float-array-variable-index.shader_test
+ */
+ if (brw->gen >= 7)
+ ctx->Const.UseSTD430AsDefaultPacking = true;
}
static void