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authorHans de Goede <[email protected]>2016-06-29 11:23:45 +0200
committerHans de Goede <[email protected]>2016-07-02 12:21:28 +0200
commit3345f70f636ba5ba096e20a343c64a1ec8e5f488 (patch)
treeba50a831b441822602f4763ef181c56f2786858e /src
parentef8e50a841e79597ca56ae081102119329fd154c (diff)
nvc0: Make NVC0_CB_AUX_GRID_INFO take an index argument
This brings it inline with the other macros like NVC0_CB_AUX_UBO_INFO and NVC0_CB_AUX_TEX_INFO. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_context.h2
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_program.c2
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nve4_compute.c4
3 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index 098d2a1add0..8aaecace1f7 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -115,7 +115,7 @@
#define NVC0_CB_AUX_MS_INFO 0x0a0
#define NVC0_CB_AUX_MS_SIZE (8 * 2 * 4)
/* block/grid size, at 3 32-bits integers each and gridid */
-#define NVC0_CB_AUX_GRID_INFO 0x0e0 /* CP */
+#define NVC0_CB_AUX_GRID_INFO(i) 0x0e0 + (i) * 4 /* CP */
#define NVC0_CB_AUX_GRID_SIZE (7 * 4)
/* 8 user clip planes, at 4 32-bits floats each */
#define NVC0_CB_AUX_UCP_INFO 0x100
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index d75b702c809..2f819ab6552 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -569,7 +569,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
if (chipset >= NVISA_GK104_CHIPSET) {
info->io.auxCBSlot = 7;
info->io.msInfoCBSlot = 7;
- info->prop.cp.gridInfoBase = NVC0_CB_AUX_GRID_INFO;
+ info->prop.cp.gridInfoBase = NVC0_CB_AUX_GRID_INFO(0);
info->io.uboInfoBase = NVC0_CB_AUX_UBO_INFO(0);
}
} else {
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index a3f33a7d631..5fddd924609 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -431,8 +431,8 @@ nve4_compute_upload_input(struct nvc0_context *nvc0,
PUSH_DATAp(push, info->input, cp->parm_size / 4);
}
BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
- PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO);
- PUSH_DATA (push, address + NVC0_CB_AUX_GRID_INFO);
+ PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO(0));
+ PUSH_DATA (push, address + NVC0_CB_AUX_GRID_INFO(0));
BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2);
PUSH_DATA (push, 7 * 4);
PUSH_DATA (push, 0x1);