diff options
| author | Nicolai Hähnle <[email protected]> | 2016-11-29 15:53:19 +0100 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-12-12 09:04:36 +0100 |
| commit | 21f2bb22a3077dce5ce8e93a0bebc9a9b7fdb82d (patch) | |
| tree | b86266ec456255d789ead9c7606d55f6d20d6d01 /src | |
| parent | fc0e009aa7c4b865f4fbd3a46a1cd5259f121f0e (diff) | |
radeonsi: do not export VS outputs from vertex streams != 0
This affects for GS copy shaders. When an output is meant for vertex
stream != 0, then we don't have to make it available to the pixel
shader.
There is a minor inefficiency here because the GLSL varying packing pass
does not group varyings of the same vertex stream together, but it
shouldn't be important in practice.
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 5a40c5ee91d..7c8fad1d659 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2394,6 +2394,12 @@ static void si_llvm_export_vs(struct lp_build_tgsi_context *bld_base, break; } + if (outputs[i].vertex_stream[0] != 0 && + outputs[i].vertex_stream[1] != 0 && + outputs[i].vertex_stream[2] != 0 && + outputs[i].vertex_stream[3] != 0) + export_param = false; + handle_semantic: /* Select the correct target */ switch(semantic_name) { |