diff options
author | Topi Pohjolainen <[email protected]> | 2016-08-25 17:46:09 +0300 |
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committer | Topi Pohjolainen <[email protected]> | 2016-09-12 08:58:38 +0300 |
commit | 1634a4963c64d84da89ce47ba01828a7fc22d22a (patch) | |
tree | 00b6e665524882a03e43286790f6b08392d35521 /src | |
parent | e77bf3247524df31d19cf4c09a19fb8b52fd9d9d (diff) |
i965/rbc: Allow integer formats as advertised in isl_format.c
Blorp consults brw_is_color_fast_clear_compatible() to see if any
restrictions apply for fast clear in addition to the capablities
advertised in isl_format.c::format_info[]. On Gen8+ integer formats
are backlisted for plain old fast clear but there is no reason why
lossless compression shouldn't be supported. In fact, lossless
compression of integer formats is already supported for normal
render paths.
This patch prepares for dropping the delayed allocating of the mcs
buffer for lossless compression. Until now the skip of fast clear
also prevented the mcs being allocated and hence the lossless
compression being effectively turned off for integer formats.
Once the mcs buffer is allocated beforehand, the assertion addressed
here would start triggering.
v2: Drop the assert instead of relaxing it (Jason)
Fix typo while at it.
Signed-off-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index c902f2e2ec4..b0fbb64ce38 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -759,10 +759,9 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, if (intel_miptree_is_lossless_compressed(brw, irb->mt)) { /* Compressed buffers can be cleared also using normal rep-clear. In - * such case they bahave such as if they were drawn using normal 3D + * such case they behave such as if they were drawn using normal 3D * render pipeline, and we simply mark the mcs as dirty. */ - assert(partial_clear); irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; } } |