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authorKenneth Graunke <[email protected]>2012-10-08 10:26:13 -0700
committerKenneth Graunke <[email protected]>2012-11-01 14:29:19 -0700
commitfd8655aa7a78f3ded44e9dee572f17309a44a945 (patch)
tree0c775c486b4c3f5338512f1a4ef8cceba91a3830 /src
parent6bc021bc78903898f17fcdf328c544e13bb3cace (diff)
i965/vs: Add support for emitting DPH opcodes.
Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_emit.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp1
3 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index bad6f20edda..402e67ab818 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -349,6 +349,7 @@ public:
vec4_instruction *XOR(dst_reg dst, src_reg src0, src_reg src1);
vec4_instruction *DP3(dst_reg dst, src_reg src0, src_reg src1);
vec4_instruction *DP4(dst_reg dst, src_reg src0, src_reg src1);
+ vec4_instruction *DPH(dst_reg dst, src_reg src0, src_reg src1);
vec4_instruction *CMP(dst_reg dst, src_reg src0, src_reg src1,
uint32_t condition);
vec4_instruction *IF(src_reg src0, src_reg src1, uint32_t condition);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index ab9bc66c388..fdb42698fdc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -938,6 +938,10 @@ vec4_visitor::generate_code()
brw_SEL(p, dst, src[0], src[1]);
break;
+ case BRW_OPCODE_DPH:
+ brw_DPH(p, dst, src[0], src[1]);
+ break;
+
case BRW_OPCODE_DP4:
brw_DP4(p, dst, src[0], src[1]);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f54c49edd80..f2bf35f7e34 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -119,6 +119,7 @@ ALU2(OR)
ALU2(XOR)
ALU2(DP3)
ALU2(DP4)
+ALU2(DPH)
/** Gen4 predicated IF. */
vec4_instruction *