panfrost: Decode render target swizzle/channels

On MRT-capable systems, the framebuffer format is encoded as a 64-bit
word in the render target descriptor. Previously, the two 32-bit
words were exposed as opaque hex values. This commit identifies a 12-bit
Mali swizzle and a 2-bit channel counter, removing some of the magic. It
also adds decoding support for the AFBC and MSAA enable bits, which were
already known but otherwise ignored in pandecode.

Signed-off-by: Alyssa Rosenzweig <[email protected]>

3 files changed, 81 insertions, 23 deletions

diff --git a/src/gallium/drivers/panfrost/include/panfrost-job.h b/src/gallium/drivers/panfrost/include/panfrost-job.h
index 82b3cfb2a4f..7a2735ad363 100644
--- a/src/gallium/drivers/panfrost/include/panfrost-job.h
+++ b/src/gallium/drivers/panfrost/include/panfrost-job.h
@@ -1346,15 +1346,26 @@ struct mali_single_framebuffer {
         /* More below this, maybe */
 } __attribute__((packed));
 
-/* Format bits for the render target */
+/* Format bits for the render target flags */
 
-#define MALI_MFBD_FORMAT_AFBC 	  (1 << 10)
-#define MALI_MFBD_FORMAT_MSAA 	  (1 << 12)
-#define MALI_MFBD_FORMAT_NO_ALPHA (1 << 25)
+#define MALI_MFBD_FORMAT_AFBC 	  (1 << 5)
+#define MALI_MFBD_FORMAT_MSAA 	  (1 << 7)
+
+struct mali_rt_format {
+        unsigned unk1 : 32;
+        unsigned unk2 : 3;
+
+        unsigned nr_channels : 2; /* MALI_POSITIVE */
+
+        unsigned flags : 11;
+
+        unsigned swizzle : 12;
+
+        unsigned unk4 : 4;
+} __attribute__((packed));
 
 struct bifrost_render_target {
-        u32 unk1; // = 0x4000000
-        u32 format;
+        struct mali_rt_format format;
 
         u64 zero1;
 
diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 508f55200af..9c0f0420e2b 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -80,7 +80,7 @@ panfrost_set_framebuffer_msaa(struct panfrost_context *ctx, bool enabled)
         if (require_sfbd) {
                 SET_BIT(ctx->fragment_sfbd.format, MALI_FRAMEBUFFER_MSAA_A | MALI_FRAMEBUFFER_MSAA_B, enabled);
         } else {
-                SET_BIT(ctx->fragment_rts[0].format, MALI_MFBD_FORMAT_MSAA, enabled);
+                SET_BIT(ctx->fragment_rts[0].format.flags, MALI_MFBD_FORMAT_MSAA, enabled);
 
                 SET_BIT(ctx->fragment_mfbd.unk1, (1 << 4) | (1 << 1), enabled);
 
@@ -167,7 +167,7 @@ panfrost_set_fragment_afbc(struct panfrost_context *ctx)
                 ctx->fragment_rts[0].afbc.stride = 0;
                 ctx->fragment_rts[0].afbc.unk = 0x30009;
 
-                ctx->fragment_rts[0].format |= MALI_MFBD_FORMAT_AFBC;
+                ctx->fragment_rts[0].format.flags |= MALI_MFBD_FORMAT_AFBC;
 
                 /* Point rendering to our special framebuffer */
                 ctx->fragment_rts[0].framebuffer = rsrc->bo->afbc_slab.gpu + rsrc->bo->afbc_metadata_size;
@@ -210,7 +210,12 @@ panfrost_set_fragment_afbc(struct panfrost_context *ctx)
                         assert(0);
                 }
 
-                ctx->fragment_rts[0].format = 0x80008000;
+                struct mali_rt_format null_rt = {
+                        .unk1 = 0x4000000,
+                        .unk4 = 0x8
+                };
+
+                ctx->fragment_rts[0].format = null_rt;
                 ctx->fragment_rts[0].framebuffer = 0;
                 ctx->fragment_rts[0].framebuffer_stride = 0;
         }
@@ -375,9 +380,20 @@ panfrost_new_frag_framebuffer(struct panfrost_context *ctx)
                 fb.rt_count_2 = 1;
                 fb.unk3 = 0x100;
 
+                /* By default, Gallium seems to need a BGR framebuffer */
+                unsigned char bgra[4] = {
+                        PIPE_SWIZZLE_Z, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_X, PIPE_SWIZZLE_W
+                };
+
                 struct bifrost_render_target rt = {
-                        .unk1 = 0x4000000,
-                        .format = 0x860a8899, /* RGBA32, no MSAA */
+                        .format = {
+                                .unk1 = 0x4000000,
+                                .unk2 = 0x1,
+                                .nr_channels = MALI_POSITIVE(4),
+                                .flags = 0x444,
+                                .swizzle = panfrost_translate_swizzle_4(bgra),
+                                .unk4 = 0x8
+                        },
                         .framebuffer = framebuffer,
                         .framebuffer_stride = (stride / 16) & 0xfffffff,
                 };
diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c b/src/gallium/drivers/panfrost/pandecode/decode.c
index 0492061afd2..ea635bbe981 100644
--- a/src/gallium/drivers/panfrost/pandecode/decode.c
+++ b/src/gallium/drivers/panfrost/pandecode/decode.c
@@ -201,6 +201,14 @@ static const struct pandecode_flag_info fb_fmt_flag_info[] = {
 };
 #undef FLAG_INFO
 
+#define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
+static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
+        FLAG_INFO(AFBC),
+        FLAG_INFO(MSAA),
+        {}
+};
+#undef FLAG_INFO
+
 extern char *replace_fragment;
 extern char *replace_vertex;
 
@@ -467,6 +475,40 @@ pandecode_replay_sfbd(uint64_t gpu_va, int job_no)
 }
 
 static void
+pandecode_replay_swizzle(unsigned swizzle)
+{
+	pandecode_prop("swizzle = %s | (%s << 3) | (%s << 6) | (%s << 9)",
+			pandecode_channel_name((swizzle >> 0) & 0x7),
+			pandecode_channel_name((swizzle >> 3) & 0x7),
+			pandecode_channel_name((swizzle >> 6) & 0x7),
+			pandecode_channel_name((swizzle >> 9) & 0x7));
+}
+
+static void
+pandecode_rt_format(struct mali_rt_format format)
+{
+        pandecode_log(".format = {\n");
+        pandecode_indent++;
+
+        pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
+        pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
+
+        pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
+                        MALI_NEGATIVE(format.nr_channels));
+
+        pandecode_log(".flags = ");
+        pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
+        pandecode_log_cont(",\n");
+
+        pandecode_replay_swizzle(format.swizzle);
+
+        pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
+
+        pandecode_indent--;
+        pandecode_log("},\n");
+}
+
+static void
 pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no)
 {
         struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
@@ -643,8 +685,7 @@ pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no)
                 pandecode_log("{\n");
                 pandecode_indent++;
 
-                pandecode_prop("unk1 = 0x%" PRIx32, rt->unk1);
-                pandecode_prop("format = 0x%" PRIx32, rt->format);
+                pandecode_rt_format(rt->format);
 
                 /* TODO: How the actual heck does AFBC enabling work here? */
                 if (0) {
@@ -818,16 +859,6 @@ pandecode_replay_blend_equation(const struct mali_blend_equation *blend, const c
         pandecode_log("},\n");
 }
 
-static void
-pandecode_replay_swizzle(unsigned swizzle)
-{
-	pandecode_prop("swizzle = %s | (%s << 3) | (%s << 6) | (%s << 9)",
-			pandecode_channel_name((swizzle >> 0) & 0x7),
-			pandecode_channel_name((swizzle >> 3) & 0x7),
-			pandecode_channel_name((swizzle >> 6) & 0x7),
-			pandecode_channel_name((swizzle >> 9) & 0x7));
-}
-
 static int
 pandecode_replay_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
 {