diff options
author | Francisco Jerez <[email protected]> | 2015-02-19 14:52:24 +0200 |
---|---|---|
committer | Francisco Jerez <[email protected]> | 2015-05-04 17:44:17 +0300 |
commit | f2fad0dc80627e853eea558498f18a9fa769992e (patch) | |
tree | 51302a9f50dd09bf7bab7f52e158a91ca1788aa7 /src | |
parent | c74511f5dc239eefb8604294c6c1e57b3a394111 (diff) |
i965: Perform basic optimizations on the BROADCAST opcode.
v2: Style fixes.
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 16 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_ir_fs.h | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_ir_vec4.h | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 1 |
8 files changed, 44 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f5e8dfa42e1..182c79fc83c 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -2546,6 +2546,22 @@ fs_visitor::opt_algebraic() } break; } + case SHADER_OPCODE_BROADCAST: + if (is_uniform(inst->src[0])) { + inst->opcode = BRW_OPCODE_MOV; + inst->sources = 1; + inst->force_writemask_all = true; + progress = true; + } else if (inst->src[1].file == IMM) { + inst->opcode = BRW_OPCODE_MOV; + inst->src[0] = component(inst->src[0], + inst->src[1].fixed_hw_reg.dw1.ud); + inst->sources = 1; + inst->force_writemask_all = true; + progress = true; + } + break; + default: break; } diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp index c9ce2bd4513..d926c1d0f21 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp @@ -608,6 +608,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry) break; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: + case SHADER_OPCODE_BROADCAST: inst->src[i] = val; progress = true; break; diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index c1d06161cbf..8958e621802 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -89,6 +89,7 @@ is_expression(const fs_inst *const inst) case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD: case FS_OPCODE_CINTERP: case FS_OPCODE_LINTERP: + case SHADER_OPCODE_BROADCAST: return true; case SHADER_OPCODE_RCP: case SHADER_OPCODE_RSQ: diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index 1e54bb23301..0727ac5109e 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_fs.h +++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h @@ -166,6 +166,13 @@ component(fs_reg reg, unsigned idx) return reg; } +static inline bool +is_uniform(const fs_reg ®) +{ + return (reg.width == 1 || reg.stride == 0 || reg.is_null()) && + (!reg.reladdr || is_uniform(*reg.reladdr)); +} + /** * Get either of the 8-component halves of a 16-component register. * diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h index 955a62d5f9e..a56fdd6fce9 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h @@ -95,6 +95,13 @@ negate(src_reg reg) return reg; } +static inline bool +is_uniform(const src_reg ®) +{ + return (reg.file == IMM || reg.file == UNIFORM || reg.is_null()) && + (!reg.reladdr || is_uniform(*reg.reladdr)); +} + class dst_reg : public backend_reg { public: diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 4f755538d33..607129bc63f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -682,6 +682,16 @@ vec4_visitor::opt_algebraic() } break; } + case SHADER_OPCODE_BROADCAST: + if (is_uniform(inst->src[0]) || + inst->src[1].is_zero()) { + inst->opcode = BRW_OPCODE_MOV; + inst->src[1] = src_reg(); + inst->force_writemask_all = true; + progress = true; + } + break; + default: break; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp index 0fbf0ab50a4..2d9afa8145f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp @@ -152,6 +152,7 @@ try_constant_propagate(const struct brw_device_info *devinfo, switch (inst->opcode) { case BRW_OPCODE_MOV: + case SHADER_OPCODE_BROADCAST: inst->src[arg] = value; return true; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp index 100e511a56c..66b531c2909 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp @@ -72,6 +72,7 @@ is_expression(const vec4_instruction *const inst) case BRW_OPCODE_MAD: case BRW_OPCODE_LRP: case VEC4_OPCODE_UNPACK_UNIFORM: + case SHADER_OPCODE_BROADCAST: return true; case SHADER_OPCODE_RCP: case SHADER_OPCODE_RSQ: |