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authorDave Airlie <[email protected]>2010-01-11 13:21:47 +1000
committerDave Airlie <airlied@itt42.(none)>2010-01-11 13:27:20 +1000
commitefaba97eaaf47ffecf1577777df1e8a700ada8de (patch)
tree6d9f6027930342292e1c4f627c1316a4176762c5 /src
parent1294df9ca4ec39f00de3f9d923316f6641c1fb4a (diff)
radeon: fix prediction for r100 inline vert/elt emits.
On r100 we emit the indices inline so we need to account for that in the emission size.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tcl.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index b334ea05e5b..cd02bfbcf5d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -412,6 +412,7 @@ static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
space_required += vbuf;
else
space_required += index + elts;
+ space_required += VB->Primitive[i].count * 3;
space_required += AOS_BUFSZ(nr_aos);
}
space_required += SCISSOR_BUFSZ;